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    Searched refs:ctl (Results 1 - 25 of 170) sorted by relevancy

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  /src/sys/arch/mvme68k/stand/sboot/
console.c 38 volatile u_char ctl; member in struct:zs_hw
55 zs->ctl = 1; rr1 = zs->ctl;
56 zs->ctl = 0;
57 if ((rr1 & 0x1) == 1 && (zs->ctl & 0x4) == 4)
60 zs->ctl = 9;
61 zs->ctl = 0x00; /* clear interrupt */
62 zs->ctl = 4;
63 zs->ctl = 0x44; /* 16x clk, 1 stop bit */
64 zs->ctl = 5
    [all...]
  /src/usr.bin/audio/
Makefile 3 SUBDIR= common .WAIT ctl play record
  /src/usr.bin/audio/ctl/
Makefile 4 SRCS= ctl.c
  /src/sys/dev/ic/
ds1286reg.h 148 u_int ctl; \
151 ctl = ds1286_read(sc, DS1286_CONTROL); \
152 ds1286_write(sc, DS1286_CONTROL, ctl | DS1286_TE); \
159 ds1286_write(sc, DS1286_CONTROL, ctl); \
169 u_int ctl; \
172 ctl = ds1286_read(sc, DS1286_CONTROL); \
173 ds1286_write(sc, DS1286_CONTROL, ctl | DS1286_TE); \
180 ds1286_write(sc, DS1286_CONTROL, ctl); \
ds1687reg.h 218 u_int ctl; \
221 ctl = ds1687_read(sc, DS1687_CONTROLB); \
222 ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
234 ds1687_write(sc, DS1687_CONTROLB, ctl); \
244 u_int ctl; \
247 ctl = ds1687_read(sc, DS1687_CONTROLB); \
248 ds1687_write(sc, DS1687_CONTROLB, ctl | DS1687_SET); \
260 ds1687_write(sc, DS1687_CONTROLB, ctl); \
rng200.c 53 uint32_t ctl, rng, rbg; local in function:rng200_reset
56 ctl = READ4(sc, RNG200_CONTROL);
57 ctl &= ~RNG200_RBG_MASK;
58 WRITE4(sc, RNG200_CONTROL, ctl);
72 WRITE4(sc, RNG200_CONTROL, ctl | RNG200_RBG_ENABLE);
  /src/sys/dev/marvell/
mvspi.c 107 int ctl; local in function:mvspi_attach
126 ctl = GETREG(sc, MVSPI_INTCONF_REG);
128 ctl &= MVSPI_DIRHS_MASK;
129 ctl &= MVSPI_1BYTE_MASK;
131 PUTREG(sc, MVSPI_INTCONF_REG, ctl);
156 uint32_t ctl = 0, spr, sppr; local in function:mvspi_configure
168 ctl &= ~(MVSPI_CPOL_MASK);
170 ctl &= MVSPI_CPHA_MASK;
173 ctl |= MVSPI_CPOL_MASK;
174 ctl &= MVSPI_CPHA_MASK
263 int ctl; local in function:mvspi_assert
281 int ctl = GETREG(sc, MVSPI_CTRL_REG); local in function:mvspi_deassert
291 int i, j, ctl; local in function:mvspi_sched
    [all...]
  /src/sys/netinet/
tcp_vtw.c 154 vtw_ctl_t *ctl; member in struct:tcp_ports_iterator
325 idx_encode(vtw_ctl_t *ctl, uint32_t idx)
327 return (idx << ctl->idx_bits) | idx;
331 idx_decode(vtw_ctl_t *ctl, uint32_t bits)
333 uint32_t idx = bits & ctl->idx_mask;
335 if (idx_encode(ctl, idx) == bits)
418 vtw_index_v4(vtw_ctl_t *ctl, vtw_v4_t *v4)
420 if (ctl->base.v4 <= v4 && v4 <= ctl->lim.v4)
421 return v4 - ctl->base.v4
1027 vtw_ctl_t *ctl = it->ctl; local in function:vtw_next_port_v4
1141 vtw_ctl_t *ctl = it->ctl; local in function:vtw_next_port_v6
1657 vtw_ctl_t *ctl; local in function:tcp_lookup_v4
1756 vtw_ctl_t *ctl; local in function:tcp_lookup_v6
1784 vtw_ctl_t *ctl; local in function:vtw_select
1811 vtw_ctl_t *ctl; local in function:vtw_control_init
1852 vtw_ctl_t *ctl; local in function:vtw_control
1882 vtw_ctl_t *ctl; local in function:vtw_add
2062 vtw_ctl_t *ctl; local in function:vtw_restart_v4
2110 vtw_ctl_t *ctl; local in function:vtw_restart_v6
2229 vtw_ctl_t *ctl; local in function:vtw_debug_add
2375 vtw_ctl_t *ctl; local in function:vtw_sanity_check
    [all...]
  /src/sys/arch/x68k/usr.bin/tvctrl/
tvctrl.c 19 unsigned char ctl; local in function:main
31 ctl = num;
32 if (ioctl(0, ITETVCTRL, &ctl))
  /src/sys/modules/examples/executor/
executor.c 54 static once_t ctl; variable in typeref:typename:once_t
55 static ONCE_DECL(ctl);
77 RUN_ONCE(&ctl, runonce_example);
  /src/sys/arch/mips/alchemy/
au_timer.c 75 uint32_t ctl, ctr, octr; local in function:au_cal_timers
79 ctl = bus_space_read_4(st, sh, PC_COUNTER_CONTROL);
80 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1))
81 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl | CC_EO | CC_EN1);
109 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1))
110 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl);
  /src/sys/arch/mips/include/
sysarch.h 46 int ctl; member in struct:mips_cachectl_args
  /src/sys/arch/alpha/pci/
mcpcia.c 132 uint32_t ctl; local in function:mcpciaattach
163 ctl = REGVAL(MCPCIA_PCI_REV(ccp));
166 " CAP Revision %d\n", HORSE_REV(ctl),
167 (SADDLE_TYPE(ctl) & 1)? "Right": "Left", SADDLE_REV(ctl),
168 CAP_REV(ctl));
244 uint32_t ctl; local in function:mcpcia_init0
272 ctl = REGVAL(MCPCIA_WHOAMI(ccp));
273 mcbus_primary.mcbus_cpu_mid = MCBUS_CPU_MID(ctl);
274 if ((MCBUS_CPU_INFO(ctl) & CPU_Fill_Err) == 0 &
300 volatile uint32_t ctl; local in function:mcpcia_config_cleanup
    [all...]
dwlpx.c 80 uint32_t ctl; local in function:dwlpxmatch
91 if (badaddr(KV(PCIA_CTL(1) + ls), sizeof (ctl)) != 0) {
184 uint32_t ctl; local in function:dwlpx_init
199 sizeof (ctl)) != 0) {
225 ctl = REGVAL(PCIA_PRESENT + ccp->cc_sysbase);
234 } else if ((ctl >> PCIA_PRESENT_REVSHIFT) & PCIA_PRESENT_REVMASK) {
266 ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase);
267 ctl &= 0x0fffffff;
268 ctl &= ~(PCIA_CTL_MHAE(0x1f) | PCIA_CTL_IHAE(0x1f));
273 ctl |= PCIA_CTL_RMMENA | PCIA_CTL_RMMARB
    [all...]
  /src/sys/arch/arm/cortex/
gic_v2m.c 127 pcireg_t ctl; local in function:gic_v2m_msi_enable
133 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
134 ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
135 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
137 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
138 ctl &= ~PCI_MSI_CTL_MME_MASK;
139 ctl |= __SHIFTIN(ilog2(count), PCI_MSI_CTL_MME_MASK);
140 pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
145 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
146 if (ctl & PCI_MSI_CTL_64BIT_ADDR)
167 pcireg_t ctl; local in function:gic_v2m_msi_disable
185 pcireg_t ctl; local in function:gic_v2m_msix_enable
217 pcireg_t ctl; local in function:gic_v2m_msix_disable
    [all...]
  /src/sys/dev/pci/
universe_pci.c 172 u_int32_t ctl = 0x80000000; local in function:univ_pci_mapvme
176 ctl |= 0x00020000;
179 ctl |= 0x00010000;
187 ctl |= 0x00001000;
189 ctl |= 0x00004000;
191 ctl |= 0x00800000;
193 ctl |= 0x00400000;
198 printf("%s: wnd %d, map VME %x-%x to %x, ctl=%x\n",
199 d->devname, wnd, vmebase, vmebase + len, pcibase, ctl);
205 write_pcislv(d, wnd, lsi_ctl, ctl);
222 u_int32_t ctl = 0x80000000; local in function:univ_pci_mappci
    [all...]
  /src/sys/dev/i2c/
em3027.c 147 struct ctl { struct in function:em3027rtc_attach
152 } ctl; local in function:em3027rtc_attach
167 error = em3027rtc_read(sc, EM3027_CONTROL_BASE, &ctl, sizeof(ctl));
176 aprint_debug_dev(sc->sc_dev, "status=0x%02x\n", ctl.status);
179 if (ctl.status & EM3027_STATUS_VLOW2) {
183 else if (ctl.status & EM3027_STATUS_VLOW1) {
188 ctl.status = EM3027_STATUS_POWER_ON;
192 aprint_debug_dev(sc->sc_dev, "on/off=0x%02x\n", ctl.onoff);
194 if ((ctl.onoff & EM3027_ONOFF_SR) == 0)
    [all...]
  /src/sbin/mount_portal/
activate.c 112 void *ctl = NULL; local in function:send_reply
138 ctl = malloc(cmsgsize);
139 if (ctl == NULL) {
143 memset(ctl, 0, cmsgsize);
145 cmsg = (struct cmsghdr *) ctl;
153 msg.msg_control = ctl;
176 if (ctl != NULL)
177 free(ctl);
  /src/sys/arch/news68k/dev/
dmac_0266.h 30 volatile uint32_t ctl; /* Control Register */ member in struct:dma_regs
  /src/sys/arch/newsmips/apbus/
apbus_subr.c 74 struct apbus_ctl *ctl; local in function:apbus_device_to_hwaddr
79 ctl = apbus_dev->apbd_ctl;
80 if (ctl == NULL)
83 return (void *)ctl->apbc_hwbase;
143 printf("ctl: 0x%08x\n", (unsigned int)apdev->apbd_ctl);
  /src/sys/dev/hdaudio/
hdafg.c 266 #define HDAUDIO_CONTROL_GIVE(ctl) ((ctl)->ctl_step ? 1 : 0)
446 struct hdaudio_control *ctl; local in function:hdafg_control_lookup
452 ctl = &sc->sc_ctls[i];
453 if (ctl->ctl_enable == false)
455 if (ctl->ctl_widget->w_nid != nid)
457 if (dir && ctl->ctl_ndir != dir)
459 if (index >= 0 && ctl->ctl_ndir == HDAUDIO_PINDIR_IN &&
460 ctl->ctl_dir == ctl->ctl_ndir && ctl->ctl_index != index
1235 struct hdaudio_control *ctl; local in function:hdafg_control_parse
1447 struct hdaudio_control *ctl; local in function:hdafg_disable_useless
2108 struct hdaudio_control *ctl; local in function:hdafg_disable_unassoc
2222 struct hdaudio_control *ctl; local in function:hdafg_disable_crossassoc
2286 struct hdaudio_control *ctl; local in function:hdafg_control_amp_get
2407 struct hdaudio_control *ctl; local in function:hdafg_control_commit
2592 struct hdaudio_control *ctl; local in function:hdafg_control_source_amp
2683 struct hdaudio_control *ctl; local in function:hdafg_control_dest_amp
2759 struct hdaudio_control *ctl; local in function:hdafg_assign_mixers
2807 struct hdaudio_control *ctl, *masterctl = NULL; local in function:hdafg_build_mixers
3862 struct hdaudio_control *ctl = sc->sc_ctls; local in function:hdafg_detach
4131 struct hdaudio_control *ctl; local in function:hdafg_set_port
4191 struct hdaudio_control *ctl; local in function:hdafg_get_port
    [all...]
  /src/sys/arch/x86/pci/
msipic.c 340 pcireg_t ctl; local in function:msi_set_msictl_enablebit
353 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
355 ctl |= PCI_MSI_CTL_MSI_ENABLE;
357 ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
360 pci_conf_write16(pc, tag, off + PCI_MSI_CTL + 2, ctl >> 16);
362 pci_conf_write(pc, tag, off, ctl);
394 pcireg_t ctl; local in function:msi_addroute
403 ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
428 if (ctl & PCI_MSI_CTL_64BIT_ADDR) {
437 ctl |= PCI_MSI_CTL_MSI_ENABLE
573 pcireg_t ctl; local in function:msix_addroute
816 pcireg_t ctl; local in function:msipic_set_msi_vectors
    [all...]
  /src/sys/arch/arm/broadcom/
bcm2835_cm.c 137 bcm_cm_set(enum bcm_cm_clock clk, uint32_t ctl, uint32_t div)
174 ctl &= ~CM_CTL_PASSWD;
175 ctl |= __SHIFTIN(CM_PASSWD, CM_CTL_PASSWD);
195 CM_WRITE(sc, ctlreg, ctl & ~CM_CTL_ENAB);
198 if (ctl & CM_CTL_ENAB) {
199 CM_WRITE(sc, ctlreg, ctl);
  /src/usr.bin/talk/
Makefile 9 SRCS= ctl.c ctl_transact.c display.c get_addrs.c get_names.c \
  /src/sys/arch/luna68k/dev/
if_le.c 212 * accessible 4bit-wise by ctl register operation. The register is
220 volatile struct { uint32_t ctl; } *ds1220; member in struct:myetheraddr::__anon95280f3e0108
243 ds1220->ctl = (loc) << 16;
244 u = 0xf0 & (ds1220->ctl >> 12);
245 ds1220->ctl = (loc + 1) << 16;
246 l = 0x0f & (ds1220->ctl >> 16);
249 ds1220->ctl = (loc + 2) << 16;
250 u = 0xf0 & (ds1220->ctl >> 12);
251 ds1220->ctl = (loc + 3) << 16;
252 l = 0x0f & (ds1220->ctl >> 16)
    [all...]

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