| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_afmt.c | 105 amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
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| amdgpu.h | 1224 int cts_32khz; member in struct:amdgpu_afmt_acr
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| amdgpu_dce_v10_0.c | 1498 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz);
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| amdgpu_dce_v11_0.c | 1540 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz);
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| amdgpu_dce_v6_0.c | 1429 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz);
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| amdgpu_dce_v8_0.c | 1460 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| stream_encoder.h | 63 uint32_t cts_32khz; member in struct:audio_clock_info
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_dce3_1_afmt.c | 186 HDMI0_ACR_CTS_32(acr->cts_32khz),
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| radeon_evergreen_hdmi.c | 92 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));
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| radeon_r600_hdmi.c | 198 HDMI0_ACR_CTS_32(acr->cts_32khz),
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| radeon_audio.c | 617 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
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| radeon.h | 2982 int cts_32khz; member in struct:radeon_hdmi_acr
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_stream_encoder.c | 1328 audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10;
1406 REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_stream_encoder.c | 1266 audio_clock_info->cts_32khz = actual_pixel_clock_100Hz / 10;
1338 REG_UPDATE(HDMI_ACR_32_0, HDMI_ACR_CTS_32, audio_clock_info.cts_32khz);
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