/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
dce112_hw_sequencer.h | 34 struct dc; 36 void dce112_hw_sequencer_construct(struct dc *dc);
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dce112_resource.h | 33 struct dc; 38 struct dc *dc); 41 struct dc *dc, 48 struct dc *dc, 53 struct dc *dc,
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
dce80_hw_sequencer.h | 34 struct dc; 36 void dce80_hw_sequencer_construct(struct dc *dc);
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dce80_resource.h | 33 struct dc; 38 struct dc *dc); 42 struct dc *dc); 46 struct dc *dc);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
dcn10_init.h | 31 struct dc; 33 void dcn10_hw_sequencer_construct(struct dc *dc);
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dcn10_hw_sequencer_debug.h | 33 struct dc; 35 void dcn10_clear_status_bits(struct dc *dc, unsigned int mask); 37 void dcn10_log_hw_state(struct dc *dc, 40 void dcn10_get_hw_state(struct dc *dc,
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dcn10_hw_sequencer.h | 34 struct dc; 36 void dcn10_hw_sequencer_construct(struct dc *dc); 39 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx); 43 struct dc *dc); 45 struct dc *dc, 48 struct dc *dc [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
dcn20_init.h | 31 struct dc; 33 void dcn20_hw_sequencer_construct(struct dc *dc);
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dcn20_hwseq.h | 38 struct dc *dc, 40 void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx); 41 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx); 42 bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, 44 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
dcn21_init.h | 31 struct dc; 33 void dcn21_hw_sequencer_construct(struct dc *dc);
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dcn21_hwseq.h | 33 struct dc; 36 struct dc *dc, 39 bool dcn21_s0i3_golden_init_wa(struct dc *dc); 42 const struct dc *dc, 46 const struct dc *dc,
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dcn21_resource.h | 36 struct dc; 45 struct dc *dc);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
dce120_hw_sequencer.h | 34 struct dc; 37 void dce120_hw_sequencer_construct(struct dc *dc);
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dce120_resource.h | 33 struct dc; 38 struct dc *dc);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/ |
dce100_hw_sequencer.h | 34 struct dc; 37 void dce100_hw_sequencer_construct(struct dc *dc); 40 struct dc *dc, 44 struct dc *dc, 47 bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
hw_sequencer.h | 60 void (*init_hw)(struct dc *dc); 61 void (*enable_accelerated_mode)(struct dc *dc, 63 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 65 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 66 void (*apply_ctx_for_surface)(struct dc *dc, [all...] |
hw_sequencer_private.h | 71 void (*disable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx); 72 void (*enable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx); 73 void (*init_pipes)(struct dc *dc, struct dc_state *context); 74 void (*reset_hw_ctx_wrap)(struct dc *dc, struct dc_state *context); 75 void (*update_plane_addr)(const struct dc *dc, [all...] |
/src/sys/arch/m68k/060sp/dist/ |
pfpsp.sa | 38 dc.l $60ff0000,$17400000,$60ff0000,$15f40000 39 dc.l $60ff0000,$02b60000,$60ff0000,$04700000 40 dc.l $60ff0000,$1b100000,$60ff0000,$19aa0000 41 dc.l $60ff0000,$1b5a0000,$60ff0000,$062e0000 42 dc.l $60ff0000,$102c0000,$51fc51fc,$51fc51fc 43 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 44 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 45 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 46 dc.l $2f00203a,$ff2c487b,$0930ffff,$fef8202f 47 dc.l $00044e74,$00042f00,$203afef2,$487b093 [all...] |
fpsp.sa | 38 dc.l $60ff0000,$17400000,$60ff0000,$15f40000 39 dc.l $60ff0000,$02b60000,$60ff0000,$04700000 40 dc.l $60ff0000,$1b100000,$60ff0000,$19aa0000 41 dc.l $60ff0000,$1b5a0000,$60ff0000,$062e0000 42 dc.l $60ff0000,$102c0000,$51fc51fc,$51fc51fc 43 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 44 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 45 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 46 dc.l $2f00203a,$ff2c487b,$0930ffff,$fef8202f 47 dc.l $00044e74,$00042f00,$203afef2,$487b093 [all...] |
ilsp.sa | 38 dc.l $60ff0000,$01fe0000,$60ff0000,$02080000 39 dc.l $60ff0000,$04900000,$60ff0000,$04080000 40 dc.l $60ff0000,$051e0000,$60ff0000,$053c0000 41 dc.l $60ff0000,$055a0000,$60ff0000,$05740000 42 dc.l $60ff0000,$05940000,$60ff0000,$05b40000 43 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 44 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 45 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 46 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 47 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51f [all...] |
isp.sa | 38 dc.l $60ff0000,$02360000,$60ff0000,$16260000 39 dc.l $60ff0000,$12dc0000,$60ff0000,$11ea0000 40 dc.l $60ff0000,$10de0000,$60ff0000,$12a40000 41 dc.l $60ff0000,$12560000,$60ff0000,$122a0000 42 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 43 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 44 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 45 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc 46 dc.l $2f00203a,$fefc487b,$0930ffff,$fef8202f 47 dc.l $00044e74,$00042f00,$203afeea,$487b093 [all...] |
ftest.sa | 38 dc.l $60ff0000,$00d40000,$60ff0000,$016c0000 39 dc.l $60ff0000,$01a80000,$54657374,$696e6720 40 dc.l $36383036,$30204650,$53502073,$74617274 41 dc.l $65643a0a,$00546573,$74696e67,$20363830 42 dc.l $36302046,$50535020,$756e696d,$706c656d 43 dc.l $656e7465,$6420696e,$73747275,$6374696f 44 dc.l $6e207374,$61727465,$643a0a00,$54657374 45 dc.l $696e6720,$36383036,$30204650,$53502065 46 dc.l $78636570,$74696f6e,$20656e61,$626c6564 47 dc.l $20737461,$72746564,$3a0a0070,$6173736 [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
dce110_hw_sequencer.h | 34 struct dc; 38 void dce110_hw_sequencer_construct(struct dc *dc); 41 struct dc *dc, 60 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context); 62 void dce110_power_down(struct dc *dc); 69 struct dc *dc [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
amdgpu_dc_vm_helper.c | 32 #include "dc.h" 42 int dc_setup_system_context(struct dc *dc, struct dc_phy_addr_space_config *pa_config) 47 if (dc->hwss.init_sys_ctx) { 48 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); 53 memcpy(&dc->vm_pa_config, pa_config, sizeof(struct dc_phy_addr_space_config)); 54 dc->vm_pa_config.valid = true; 60 void dc_setup_vm_context(struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid [all...] |
/src/usr.bin/dc/USD.doc/ |
Makefile | 4 ARTICLE=dc 5 SRCS= dc
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