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Searched
refs:dfixed_const
(Results
1 - 14
of
14
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rs690.c
86
tmp.full =
dfixed_const
(100);
87
rdev->pm.igp_sideport_mclk.full =
dfixed_const
(le32_to_cpu(info->info.ulBootUpMemoryClock));
90
rdev->pm.igp_system_mclk.full =
dfixed_const
(le16_to_cpu(info->info.usK8MemoryClock));
92
rdev->pm.igp_system_mclk.full =
dfixed_const
(rdev->clock.default_mclk);
95
rdev->pm.igp_system_mclk.full =
dfixed_const
(400);
96
rdev->pm.igp_ht_link_clk.full =
dfixed_const
(le16_to_cpu(info->info.usFSBClock));
97
rdev->pm.igp_ht_link_width.full =
dfixed_const
(info->info.ucHTLinkWidth);
100
tmp.full =
dfixed_const
(100);
101
rdev->pm.igp_sideport_mclk.full =
dfixed_const
(le32_to_cpu(info->info_v2.ulBootUpSidePortClock));
104
rdev->pm.igp_system_mclk.full =
dfixed_const
(le32_to_cpu(info->info_v2.ulBootUpUMAClock))
[
all
...]
radeon_rv515.c
986
a.full =
dfixed_const
(100);
987
sclk.full =
dfixed_const
(selected_sclk);
990
if (crtc->vsc.full >
dfixed_const
(2))
991
wm->num_line_pair.full =
dfixed_const
(2);
993
wm->num_line_pair.full =
dfixed_const
(1);
995
b.full =
dfixed_const
(mode->crtc_hdisplay);
996
c.full =
dfixed_const
(256);
1000
if (a.full <
dfixed_const
(4)) {
1012
a.full =
dfixed_const
(mode->clock);
1013
b.full =
dfixed_const
(1000)
[
all
...]
radeon_r100.c
3287
temp_ff.full =
dfixed_const
(temp);
3294
temp_ff.full =
dfixed_const
(1000);
3295
pix_clk.full =
dfixed_const
(mode1->clock); /* convert to fixed point */
3297
temp_ff.full =
dfixed_const
(pixel_bytes1);
3301
temp_ff.full =
dfixed_const
(1000);
3302
pix_clk2.full =
dfixed_const
(mode2->clock); /* convert to fixed point */
3304
temp_ff.full =
dfixed_const
(pixel_bytes2);
3350
trcd_ff.full =
dfixed_const
(mem_trcd);
3351
trp_ff.full =
dfixed_const
(mem_trp);
3352
tras_ff.full =
dfixed_const
(mem_tras)
[
all
...]
radeon_si.c
2087
a.full =
dfixed_const
(1000);
2088
yclk.full =
dfixed_const
(wm->yclk);
2090
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
2091
a.full =
dfixed_const
(10);
2092
dram_efficiency.full =
dfixed_const
(7);
2107
a.full =
dfixed_const
(1000);
2108
yclk.full =
dfixed_const
(wm->yclk);
2110
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
2111
a.full =
dfixed_const
(10);
2112
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
radeon_evergreen.c
1959
a.full =
dfixed_const
(1000);
1960
yclk.full =
dfixed_const
(wm->yclk);
1962
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
1963
a.full =
dfixed_const
(10);
1964
dram_efficiency.full =
dfixed_const
(7);
1979
a.full =
dfixed_const
(1000);
1980
yclk.full =
dfixed_const
(wm->yclk);
1982
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
1983
a.full =
dfixed_const
(10);
1984
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
radeon_display.c
1758
a.full =
dfixed_const
(src_v);
1759
b.full =
dfixed_const
(dst_v);
1761
a.full =
dfixed_const
(src_h);
1762
b.full =
dfixed_const
(dst_h);
1765
radeon_crtc->vsc.full =
dfixed_const
(1);
1766
radeon_crtc->hsc.full =
dfixed_const
(1);
radeon_cik.c
9013
a.full =
dfixed_const
(1000);
9014
yclk.full =
dfixed_const
(wm->yclk);
9016
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
9017
a.full =
dfixed_const
(10);
9018
dram_efficiency.full =
dfixed_const
(7);
9042
a.full =
dfixed_const
(1000);
9043
yclk.full =
dfixed_const
(wm->yclk);
9045
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
9046
a.full =
dfixed_const
(10);
9047
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
radeon_device.c
762
a.full =
dfixed_const
(100);
763
rdev->pm.sclk.full =
dfixed_const
(sclk);
765
rdev->pm.mclk.full =
dfixed_const
(mclk);
769
a.full =
dfixed_const
(16);
/src/sys/external/bsd/drm2/dist/include/drm/
drm_fixed.h
37
#define
dfixed_const
(A) (((u32)(A) << 12))/* + ((B + 0.000122)*4096)) */
macro
42
#define dfixed_init(A) { .full =
dfixed_const
((A)) }
51
return
dfixed_const
(non_frac);
58
if (A.full >
dfixed_const
(non_frac))
59
return
dfixed_const
(non_frac + 1);
61
return
dfixed_const
(non_frac);
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v6_0.c
530
a.full =
dfixed_const
(1000);
531
yclk.full =
dfixed_const
(wm->yclk);
533
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
534
a.full =
dfixed_const
(10);
535
dram_efficiency.full =
dfixed_const
(7);
559
a.full =
dfixed_const
(1000);
560
yclk.full =
dfixed_const
(wm->yclk);
562
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
563
a.full =
dfixed_const
(10);
564
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
amdgpu_dce_v10_0.c
732
a.full =
dfixed_const
(1000);
733
yclk.full =
dfixed_const
(wm->yclk);
735
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
736
a.full =
dfixed_const
(10);
737
dram_efficiency.full =
dfixed_const
(7);
761
a.full =
dfixed_const
(1000);
762
yclk.full =
dfixed_const
(wm->yclk);
764
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
765
a.full =
dfixed_const
(10);
766
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
amdgpu_dce_v11_0.c
758
a.full =
dfixed_const
(1000);
759
yclk.full =
dfixed_const
(wm->yclk);
761
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
762
a.full =
dfixed_const
(10);
763
dram_efficiency.full =
dfixed_const
(7);
787
a.full =
dfixed_const
(1000);
788
yclk.full =
dfixed_const
(wm->yclk);
790
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
791
a.full =
dfixed_const
(10);
792
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
amdgpu_dce_v8_0.c
667
a.full =
dfixed_const
(1000);
668
yclk.full =
dfixed_const
(wm->yclk);
670
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
671
a.full =
dfixed_const
(10);
672
dram_efficiency.full =
dfixed_const
(7);
696
a.full =
dfixed_const
(1000);
697
yclk.full =
dfixed_const
(wm->yclk);
699
dram_channels.full =
dfixed_const
(wm->dram_channels * 4);
700
a.full =
dfixed_const
(10);
701
disp_dram_allocation.full =
dfixed_const
(3); /* XXX worse case value 0.3 *
[
all
...]
amdgpu_display.c
760
a.full =
dfixed_const
(src_v);
761
b.full =
dfixed_const
(dst_v);
763
a.full =
dfixed_const
(src_h);
764
b.full =
dfixed_const
(dst_h);
767
amdgpu_crtc->vsc.full =
dfixed_const
(1);
768
amdgpu_crtc->hsc.full =
dfixed_const
(1);
Completed in 53 milliseconds
Indexes created Mon Feb 23 16:20:21 UTC 2026