| /src/sys/dev/ic/ |
| wdcvar.h | 113 int dma_status; /* status returned from dma_finish() */ member in struct:wdc_softc
|
| dwc_gmac.c | 1444 uint32_t status, dma_status; local in function:dwc_gmac_intr
1461 dma_status = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
1464 if (dma_status & (GMAC_DMA_INT_NIE | GMAC_DMA_INT_AIE))
1467 if (dma_status & GMAC_DMA_INT_TIE)
1470 if (dma_status & GMAC_DMA_INT_RIE)
1476 if (dma_status & GMAC_DMA_INT_ERRORS) {
1483 rnd_add_uint32(&sc->rnd_source, dma_status);
1486 if (dma_status)
1488 AWIN_GMAC_DMA_STATUS, dma_status & GMAC_DMA_INT_MASK);
1734 uint32_t dma_status = bus_space_read_4(sc->sc_bst, sc->sc_bsh local in function:dwc_dump_status
[all...] |
| dwc_eqos.c | 1130 uint32_t mac_status, mtl_status, dma_status, rx_tx_status; local in function:eqos_intr
1148 dma_status = RD4(sc, GMAC_DMA_CHAN0_STATUS);
1149 dma_status &= RD4(sc, GMAC_DMA_CHAN0_INTR_ENABLE);
1150 if (dma_status) {
1151 WR4(sc, GMAC_DMA_CHAN0_STATUS, dma_status);
1154 if ((dma_status & GMAC_DMA_CHAN0_STATUS_RI) != 0) {
1159 if ((dma_status & GMAC_DMA_CHAN0_STATUS_TI) != 0) {
1170 if ((mac_status | mtl_status | dma_status) == 0) {
|
| wdc.c | 926 wdc->dma_status =
929 if (wdc->dma_status & WDC_DMAST_NOIRQ) {
1324 wdc->dma_status =
1327 if ((wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
1332 wdc->dma_status = (*wdc->dma_finish)(wdc->dma_arg,
1373 wdc->dma_status =
|
| mvsata.c | 2552 if (wdc->dma_status & (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) {
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| /src/sys/arch/mipsco/obio/ |
| asc.c | 221 dma_status(struct ncr53c9x_softc *sc) function in typeref:typename:void
253 dma_status((void *)esc);
297 dma_status(sc);
396 dma_status(sc);
506 dma_status((void *)esc);
|
| /src/sys/dev/ata/ |
| ata_wdc.c | 706 if (wdc->dma_status != 0) {
|
| /src/sys/dev/scsipi/ |
| atapi_wdc.c | 1116 else if (wdc->dma_status &
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