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Searched
refs:doorbell_index
(Results
1 - 25
of
37
) sorted by relevancy
1
2
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vega10_reg_init.c
65
adev->
doorbell_index
.kiq = AMDGPU_DOORBELL64_KIQ;
66
adev->
doorbell_index
.mec_ring0 = AMDGPU_DOORBELL64_MEC_RING0;
67
adev->
doorbell_index
.mec_ring1 = AMDGPU_DOORBELL64_MEC_RING1;
68
adev->
doorbell_index
.mec_ring2 = AMDGPU_DOORBELL64_MEC_RING2;
69
adev->
doorbell_index
.mec_ring3 = AMDGPU_DOORBELL64_MEC_RING3;
70
adev->
doorbell_index
.mec_ring4 = AMDGPU_DOORBELL64_MEC_RING4;
71
adev->
doorbell_index
.mec_ring5 = AMDGPU_DOORBELL64_MEC_RING5;
72
adev->
doorbell_index
.mec_ring6 = AMDGPU_DOORBELL64_MEC_RING6;
73
adev->
doorbell_index
.mec_ring7 = AMDGPU_DOORBELL64_MEC_RING7;
74
adev->
doorbell_index
.userqueue_start = AMDGPU_DOORBELL64_USERQUEUE_START
[
all
...]
amdgpu_vega20_reg_init.c
65
adev->
doorbell_index
.kiq = AMDGPU_VEGA20_DOORBELL_KIQ;
66
adev->
doorbell_index
.mec_ring0 = AMDGPU_VEGA20_DOORBELL_MEC_RING0;
67
adev->
doorbell_index
.mec_ring1 = AMDGPU_VEGA20_DOORBELL_MEC_RING1;
68
adev->
doorbell_index
.mec_ring2 = AMDGPU_VEGA20_DOORBELL_MEC_RING2;
69
adev->
doorbell_index
.mec_ring3 = AMDGPU_VEGA20_DOORBELL_MEC_RING3;
70
adev->
doorbell_index
.mec_ring4 = AMDGPU_VEGA20_DOORBELL_MEC_RING4;
71
adev->
doorbell_index
.mec_ring5 = AMDGPU_VEGA20_DOORBELL_MEC_RING5;
72
adev->
doorbell_index
.mec_ring6 = AMDGPU_VEGA20_DOORBELL_MEC_RING6;
73
adev->
doorbell_index
.mec_ring7 = AMDGPU_VEGA20_DOORBELL_MEC_RING7;
74
adev->
doorbell_index
.userqueue_start = AMDGPU_VEGA20_DOORBELL_USERQUEUE_START
[
all
...]
amdgpu_nbio.h
63
bool use_doorbell, int
doorbell_index
, int doorbell_size);
65
int
doorbell_index
, int instance);
71
bool use_doorbell, int
doorbell_index
);
amdgpu_nbio_v2_3.c
85
bool use_doorbell, int
doorbell_index
,
96
doorbell_index
);
109
int
doorbell_index
, int instance)
118
doorbell_index
);
160
bool use_doorbell, int
doorbell_index
)
167
doorbell_index
);
amdgpu_nbio_v7_0.c
83
bool use_doorbell, int
doorbell_index
, int doorbell_size)
91
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET,
doorbell_index
);
100
int
doorbell_index
, int instance)
109
doorbell_index
);
132
bool use_doorbell, int
doorbell_index
)
137
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET,
doorbell_index
);
amdgpu_nv.c
599
adev->
doorbell_index
.kiq = AMDGPU_NAVI10_DOORBELL_KIQ;
600
adev->
doorbell_index
.mec_ring0 = AMDGPU_NAVI10_DOORBELL_MEC_RING0;
601
adev->
doorbell_index
.mec_ring1 = AMDGPU_NAVI10_DOORBELL_MEC_RING1;
602
adev->
doorbell_index
.mec_ring2 = AMDGPU_NAVI10_DOORBELL_MEC_RING2;
603
adev->
doorbell_index
.mec_ring3 = AMDGPU_NAVI10_DOORBELL_MEC_RING3;
604
adev->
doorbell_index
.mec_ring4 = AMDGPU_NAVI10_DOORBELL_MEC_RING4;
605
adev->
doorbell_index
.mec_ring5 = AMDGPU_NAVI10_DOORBELL_MEC_RING5;
606
adev->
doorbell_index
.mec_ring6 = AMDGPU_NAVI10_DOORBELL_MEC_RING6;
607
adev->
doorbell_index
.mec_ring7 = AMDGPU_NAVI10_DOORBELL_MEC_RING7;
608
adev->
doorbell_index
.userqueue_start = AMDGPU_NAVI10_DOORBELL_USERQUEUE_START
[
all
...]
amdgpu_ih.h
41
u32
doorbell_index
;
member in struct:amdgpu_ih_ring
amdgpu_nbio_v6_1.c
76
bool use_doorbell, int
doorbell_index
, int doorbell_size)
84
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET,
doorbell_index
);
120
bool use_doorbell, int
doorbell_index
)
125
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET,
doorbell_index
);
amdgpu_vega10_ih.c
201
ih->
doorbell_index
);
503
WDOORBELL32(ih->
doorbell_index
, ih->rptr);
522
WDOORBELL32(ih->
doorbell_index
, ih->rptr);
598
adev->irq.ih.
doorbell_index
= adev->
doorbell_index
.ih << 1;
605
adev->irq.ih1.
doorbell_index
= (adev->
doorbell_index
.ih + 1) << 1;
612
adev->irq.ih2.
doorbell_index
= (adev->
doorbell_index
.ih + 2) << 1;
amdgpu_nbio_v7_4.c
105
bool use_doorbell, int
doorbell_index
, int doorbell_size)
127
doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET,
doorbell_index
);
136
int
doorbell_index
, int instance)
151
doorbell_index
);
187
bool use_doorbell, int
doorbell_index
)
192
ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET,
doorbell_index
);
amdgpu_tonga_ih.c
153
OFFSET, adev->irq.ih.
doorbell_index
);
264
WDOORBELL32(ih->
doorbell_index
, ih->rptr);
294
adev->irq.ih.
doorbell_index
= adev->
doorbell_index
.ih;
amdgpu_navi10_ih.c
160
ih->
doorbell_index
);
170
ih->
doorbell_index
);
304
WDOORBELL32(ih->
doorbell_index
, ih->rptr);
333
adev->irq.ih.
doorbell_index
= adev->
doorbell_index
.ih << 1;
amdgpu_vi.c
1871
adev->
doorbell_index
.kiq = AMDGPU_DOORBELL_KIQ;
1872
adev->
doorbell_index
.mec_ring0 = AMDGPU_DOORBELL_MEC_RING0;
1873
adev->
doorbell_index
.mec_ring1 = AMDGPU_DOORBELL_MEC_RING1;
1874
adev->
doorbell_index
.mec_ring2 = AMDGPU_DOORBELL_MEC_RING2;
1875
adev->
doorbell_index
.mec_ring3 = AMDGPU_DOORBELL_MEC_RING3;
1876
adev->
doorbell_index
.mec_ring4 = AMDGPU_DOORBELL_MEC_RING4;
1877
adev->
doorbell_index
.mec_ring5 = AMDGPU_DOORBELL_MEC_RING5;
1878
adev->
doorbell_index
.mec_ring6 = AMDGPU_DOORBELL_MEC_RING6;
1879
adev->
doorbell_index
.mec_ring7 = AMDGPU_DOORBELL_MEC_RING7;
1880
adev->
doorbell_index
.gfx_ring0 = AMDGPU_DOORBELL_GFX_RING0
[
all
...]
amdgpu_jpeg_v2_5.c
124
ring->
doorbell_index
= (adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) + 1 + 8 * i;
176
(adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) + 8 * i, i);
431
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
amdgpu_jpeg_v2_0.c
112
ring->
doorbell_index
= (adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) + 1;
158
(adev->
doorbell_index
.vcn.vcn_ring0_1 << 1), 0);
452
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
amdgpu_vce_v4_0.c
116
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
185
WDOORBELL32(adev->vce.ring[0].
doorbell_index
, 0);
482
ring->
doorbell_index
= adev->
doorbell_index
.uvd_vce.vce_ring0_1 * 2;
484
ring->
doorbell_index
= adev->
doorbell_index
.uvd_vce.vce_ring2_3 * 2 + 1;
amdgpu_amdkfd.c
127
.sdma_doorbell_idx = adev->
doorbell_index
.sdma_engine,
162
adev->
doorbell_index
.first_non_cp;
164
adev->
doorbell_index
.last_non_cp;
amdgpu_vcn_v2_0.c
136
ring->
doorbell_index
= adev->
doorbell_index
.vcn.vcn_ring0_1 << 1;
164
ring->
doorbell_index
= (adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) + 2 + i;
211
ring->
doorbell_index
, 0);
1285
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
1512
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
1519
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
amdgpu_vcn_v2_5.c
197
ring->
doorbell_index
= (adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) +
208
ring->
doorbell_index
= (adev->
doorbell_index
.vcn.vcn_ring0_1 << 1) +
284
ring->
doorbell_index
, j);
1478
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
1569
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
1576
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
amdgpu_sdma_v5_0.c
346
ring->
doorbell_index
, ring->wptr << 2);
347
WDOORBELL64(ring->
doorbell_index
, ring->wptr << 2);
693
OFFSET, ring->
doorbell_index
);
701
ring->
doorbell_index
, 20);
1239
ring->
doorbell_index
= (i == 0) ?
1240
(adev->
doorbell_index
.sdma_engine[0] << 1) //get DWORD offset
1241
: (adev->
doorbell_index
.sdma_engine[1] << 1); // get DWORD offset
amdgpu_sdma_v4_0.c
711
ring->
doorbell_index
, ring->wptr << 2);
712
WDOORBELL64(ring->
doorbell_index
, ring->wptr << 2);
768
WDOORBELL64(ring->
doorbell_index
, ring->wptr << 2);
1135
OFFSET, ring->
doorbell_index
);
1225
OFFSET, ring->
doorbell_index
);
1858
ring->
doorbell_index
= adev->
doorbell_index
.sdma_engine[i] << 1;
1874
ring->
doorbell_index
= adev->
doorbell_index
.sdma_engine[i] << 1;
1875
ring->
doorbell_index
+= 0x400
[
all
...]
amdgpu_gfx_v10_0.c
301
amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->
doorbell_index
));
322
PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->
doorbell_index
));
348
PACKET3_QUERY_STATUS_DOORBELL_OFFSET(ring->
doorbell_index
) |
1256
ring->
doorbell_index
= adev->
doorbell_index
.gfx_ring0 << 1;
1258
ring->
doorbell_index
= adev->
doorbell_index
.gfx_ring1 << 1;
1285
ring->
doorbell_index
= (adev->
doorbell_index
.mec_ring0 + ring_id) << 1;
2754
DOORBELL_OFFSET, ring->
doorbell_index
);
[
all
...]
amdgpu_uvd_v7_0.c
164
WDOORBELL32(ring->
doorbell_index
, lower_32_bits(ring->wptr));
475
ring->
doorbell_index
= adev->
doorbell_index
.uvd_vce.uvd_ring0_1 * 2;
477
ring->
doorbell_index
= adev->
doorbell_index
.uvd_vce.uvd_ring2_3 * 2 + 1;
745
WDOORBELL32(adev->uvd.inst[i].ring_enc[0].
doorbell_index
, 0);
amdgpu_soc15.c
1290
ring->use_doorbell, ring->
doorbell_index
,
1291
adev->
doorbell_index
.sdma_doorbell_range);
1295
adev->irq.ih.
doorbell_index
);
/src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
kfd_doorbell.c
244
process->
doorbell_index
263
process->
doorbell_index
* kfd_doorbell_process_slice(dev);
271
process->
doorbell_index
= r;
278
if (process->
doorbell_index
)
279
ida_simple_remove(&doorbell_ida, process->
doorbell_index
);
Completed in 29 milliseconds
1
2
Indexes created Wed Oct 15 16:09:53 GMT 2025