| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dce_calcs.h | 266 struct bw_fixed dram_efficiency; member in struct:bw_calcs_data
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dce_calcs.c | 607 data->dram_efficiency = bw_frc_to_fixed(5, 10);
609 data->dram_efficiency = bw_int_to_fixed(1);
627 data->dram_efficiency = bw_frc_to_fixed(5, 10);
629 data->dram_efficiency = bw_frc_to_fixed(8, 10);
1193 data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
1195 data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));
1534 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1540 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
1545 && bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[low][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[low][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[low][s_high] == number_of_displays_enabled_with_margin))) {
1548 data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_f (…)
[all...] |
| calcs_logger.h | 217 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] dram_efficiency: %d", bw_fixed_to_int(data->dram_efficiency));
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dce_v10_0.c | 728 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce_v10_0_dram_bandwidth
737 dram_efficiency.full = dfixed_const(7);
738 dram_efficiency.full = dfixed_div(dram_efficiency, a);
740 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| amdgpu_dce_v11_0.c | 754 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce_v11_0_dram_bandwidth
763 dram_efficiency.full = dfixed_const(7);
764 dram_efficiency.full = dfixed_div(dram_efficiency, a);
766 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| amdgpu_dce_v6_0.c | 526 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce_v6_0_dram_bandwidth
535 dram_efficiency.full = dfixed_const(7);
536 dram_efficiency.full = dfixed_div(dram_efficiency, a);
538 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| amdgpu_dce_v8_0.c | 663 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce_v8_0_dram_bandwidth
672 dram_efficiency.full = dfixed_const(7);
673 dram_efficiency.full = dfixed_div(dram_efficiency, a);
675 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen.c | 1955 fixed20_12 dram_efficiency; /* 0.7 */ local in function:evergreen_dram_bandwidth
1964 dram_efficiency.full = dfixed_const(7);
1965 dram_efficiency.full = dfixed_div(dram_efficiency, a);
1967 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| radeon_si.c | 2083 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce6_dram_bandwidth
2092 dram_efficiency.full = dfixed_const(7);
2093 dram_efficiency.full = dfixed_div(dram_efficiency, a);
2095 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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| radeon_cik.c | 9009 fixed20_12 dram_efficiency; /* 0.7 */ local in function:dce8_dram_bandwidth
9018 dram_efficiency.full = dfixed_const(7);
9019 dram_efficiency.full = dfixed_div(dram_efficiency, a);
9021 bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);
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