| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dp_link_training.c | 94 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET,
116 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
160 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2);
164 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET,
169 drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
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| intel_lspcon.c | 317 ret = drm_dp_dpcd_write(aux, reg, data, 8);
332 ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
391 ret = drm_dp_dpcd_write(aux, reg, (void *)__UNCONST(data), 1);
417 ret = drm_dp_dpcd_write(aux, reg, &val, 1);
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| intel_dp_aux_backlight.c | 100 if (drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,
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| intel_dp.c | 5061 wret = drm_dp_dpcd_write(&intel_dp->aux,
5954 dpcd_ret = drm_dp_dpcd_write(&intel_dig_port->dp.aux, DP_AUX_HDCP_AN,
6341 ret = drm_dp_dpcd_write(&intel_dig_port->dp.aux,
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_helpers.c | 475 return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,
531 return (drm_dp_dpcd_write(aconnector->dsc_aux, DP_DSC_ENABLE, &enable_dsc, 1) >= 0);
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| amdgpu_dm.c | 2016 wret = drm_dp_dpcd_write(
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| /src/sys/dev/ic/ |
| anx_dp.c | 443 ret = drm_dp_dpcd_write(&sc->sc_dpaux, DP_LINK_BW_SET, bw, sizeof(bw));
465 drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
510 drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
555 drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
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| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_dp_aux_dev.c | 221 res = drm_dp_dpcd_write(aux_dev->aux, pos, buf, todo);
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| drm_dp_helper.c | 334 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
347 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, function
361 EXPORT_SYMBOL(drm_dp_dpcd_write); variable
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| drm_dp_mst_topology.c | 2069 * sideband messaging as drm_dp_dpcd_write() does for local
2100 ret = drm_dp_dpcd_write(
2683 ret = drm_dp_dpcd_write(mgr->aux, regbase + offset,
4427 ret = drm_dp_dpcd_write(mgr->aux, DP_PAYLOAD_ALLOCATE_SET, payload_alloc, 3);
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| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_dp_helper.h | 1429 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
1459 return drm_dp_dpcd_write(aux, offset, &value, 1);
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_atombios_dp.c | 503 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET,
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_atombios_dp.c | 573 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET,
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| radeon_dp_mst.c | 729 wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/ |
| nouveau_dispnv50_disp.c | 1353 drm_dp_dpcd_write(aux, DP_SINK_COUNT_ESI + 1, &esi[1], 3);
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