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    Searched refs:drm_dp_dpcd_writeb (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dp_aux_backlight.c 52 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
169 if (drm_dp_dpcd_writeb(&intel_dp->aux,
174 if (drm_dp_dpcd_writeb(&intel_dp->aux,
218 if (drm_dp_dpcd_writeb(&intel_dp->aux,
intel_psr.c 411 drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
424 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
426 drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
944 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
947 drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0);
1206 drm_dp_dpcd_writeb(&psr->dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
1443 drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val);
1466 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ESI, val);
1510 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, error_status);
intel_dp.c 3192 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE,
3212 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
3222 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
4968 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM,
5026 status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response);
5248 drm_dp_dpcd_writeb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, val);
intel_ddi.c 3267 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, DP_FEC_READY) <= 0)
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios_dp.c 474 drm_dp_dpcd_writeb(&amdgpu_connector->ddc_bus->aux,
527 drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp);
542 drm_dp_dpcd_writeb(dp_info->aux,
545 drm_dp_dpcd_writeb(dp_info->aux,
549 drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1);
555 drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp);
559 drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp);
566 drm_dp_dpcd_writeb(dp_info->aux,
579 drm_dp_dpcd_writeb(dp_info->aux,
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_atombios_dp.c 542 drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux,
609 drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp);
623 drm_dp_dpcd_writeb(dp_info->aux,
626 drm_dp_dpcd_writeb(dp_info->aux,
630 drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1);
636 drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp);
640 drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp);
651 drm_dp_dpcd_writeb(dp_info->aux,
663 drm_dp_dpcd_writeb(dp_info->aux,
  /src/sys/dev/ic/
anx_dp.c 479 drm_dp_dpcd_writeb(&sc->sc_dpaux, DP_TRAINING_PATTERN_SET,
524 drm_dp_dpcd_writeb(&sc->sc_dpaux, DP_TRAINING_PATTERN_SET,
587 if (drm_dp_dpcd_writeb(&sc->sc_dpaux, DP_SET_POWER, power) < 0)
601 drm_dp_dpcd_writeb(&sc->sc_dpaux, DP_TRAINING_PATTERN_SET,
  /src/sys/external/bsd/drm2/dist/drm/
drm_dp_helper.c 1150 ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf | DP_TEST_SINK_START);
1177 ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf & ~DP_TEST_SINK_START);
drm_dp_mst_topology.c 3548 ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
3569 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, 0);
3626 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
3677 ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
4420 drm_dp_dpcd_writeb(mgr->aux, DP_PAYLOAD_TABLE_UPDATE_STATUS,
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/
nouveau_dispnv50_disp.c 1387 ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, 0);
1393 ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL,
1511 drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0);
  /src/sys/external/bsd/drm2/dist/include/drm/
drm_dp_helper.h 1448 * drm_dp_dpcd_writeb() - write a single byte to the DPCD
1456 static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, function

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