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    Searched refs:enable_value (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/
irq_service.h 53 uint32_t enable_value[2]; member in struct:irq_source_info
amdgpu_irq_service.c 103 (info->enable_value[enable ? 0 : 1] & info->enable_mask);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/
amdgpu_irq_service_dce110.c 100 .enable_value = {\
115 .enable_value = {\
129 .enable_value = {\
144 .enable_value = {\
160 .enable_value = {\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
amdgpu_irq_service_dce80.c 103 .enable_value = {\
118 .enable_value = {\
133 .enable_value = {\
148 .enable_value = {\
164 .enable_value = {\
  /src/sys/dev/i2c/
pcai2cmux.c 174 uint8_t enable_value; member in struct:pcaiicmux_softc::pcaiicmux_bus_info
269 bus_info->enable_value =
272 bus_info->enable_value = 1 << addr;
285 error = pcaiicmux_write(sc, bus_info->enable_value, flags);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/
amdgpu_irq_service_dce120.c 114 .enable_value = {\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/
amdgpu_irq_service_dcn10.c 195 .enable_value = {\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/
amdgpu_irq_service_dcn20.c 197 .enable_value = {\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/
amdgpu_irq_service_dcn21.c 193 .enable_value = {\

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