1 /* $NetBSD: pcai2cmux.c,v 1.11 2025/09/17 13:56:40 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2020 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #if defined(__i386__) || defined(__amd64__) || defined(__aarch64__) 33 #include "acpica.h" 34 #endif 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: pcai2cmux.c,v 1.11 2025/09/17 13:56:40 thorpej Exp $"); 38 39 /* 40 * Driver for NXP PCA954x / PCA984x I2C switches and multiplexers. 41 * 42 * There are two flavors of this device: 43 * 44 * - Multiplexers, which connect the upstream bus to one downstream bus 45 * at a time. 46 * 47 * - Switches, which can connect the upstream bus to one or more downstream 48 * busses at a time (which is useful when using an all-call address for 49 * a large array of PCA9685 LED controllers, for example). 50 * 51 * Alas, the device tree bindings don't have anything specifically for 52 * switches, so we treat the switch variants as basic multiplexers, 53 * only enabling one downstream bus at a time. 54 * 55 * Note that some versions of these chips also have interrupt mux 56 * capability. XXX We do not support this yet. 57 */ 58 59 #include <sys/param.h> 60 #include <sys/systm.h> 61 #include <sys/device.h> 62 63 #include <dev/fdt/fdtvar.h> 64 #include <dev/i2c/i2cmuxvar.h> 65 66 #if NACPICA > 0 67 #include <dev/acpi/acpivar.h> 68 #endif 69 70 /* There are a maximum of 8 busses supported. */ 71 #define PCAIICMUX_MAX_BUSSES 8 72 73 struct pcaiicmux_type { 74 unsigned int nchannels; /* # of downstream channels */ 75 uint8_t enable_bit; /* if 0, chip is switch type */ 76 }; 77 78 static const struct pcaiicmux_type mux2_type = { 79 .nchannels = 2, 80 .enable_bit = __BIT(2), 81 }; 82 83 static const struct pcaiicmux_type switch2_type = { 84 .nchannels = 2, 85 .enable_bit = 0, 86 }; 87 88 static const struct pcaiicmux_type mux4_type = { 89 .nchannels = 4, 90 .enable_bit = __BIT(2), 91 }; 92 93 static const struct pcaiicmux_type switch4_type = { 94 .nchannels = 4, 95 .enable_bit = 0, 96 }; 97 98 static const struct pcaiicmux_type mux8_type = { 99 .nchannels = 8, 100 .enable_bit = __BIT(3), 101 }; 102 103 static const struct pcaiicmux_type switch8_type = { 104 .nchannels = 8, 105 .enable_bit = 0, 106 }; 107 108 static const struct device_compatible_entry compat_data[] = { 109 /* PCA9540 - 2 channel i2c mux */ 110 { .compat = "nxp,pca9540", 111 .data = &mux2_type }, 112 113 /* PCA9542 - 2 channel i2c mux with interrupts */ 114 { .compat = "nxp,pca9542", 115 .data = &mux2_type }, 116 117 /* PCA9543 - 2 channel i2c switch with interrupts */ 118 { .compat = "nxp,pca9543", 119 .data = &switch2_type }, 120 121 /* PCA9544 - 4 channel i2c mux with interrupts */ 122 { .compat = "nxp,pca9544", 123 .data = &mux4_type }, 124 125 /* PCA9545 - 4 channel i2c switch with interrupts */ 126 { .compat = "nxp,pca9545", 127 .data = &switch4_type }, 128 129 /* PCA9546 - 4 channel i2c switch */ 130 { .compat = "nxp,pca9546", 131 .data = &switch4_type }, 132 133 /* PCA9547 - 8 channel i2c mux */ 134 { .compat = "nxp,pca9547", 135 .data = &mux8_type }, 136 { .compat = "NXP0002", 137 .data = &mux8_type }, 138 139 /* PCA9548 - 8 channel i2c switch */ 140 { .compat = "nxp,pca9548", 141 .data = &switch8_type }, 142 143 /* PCA9846 - 4 channel i2c switch */ 144 { .compat = "nxp,pca9846", 145 .data = &switch4_type }, 146 147 /* PCA9847 - 8 channel i2c mux */ 148 { .compat = "nxp,pca9847", 149 .data = &mux8_type }, 150 151 /* PCA9848 - 8 channel i2c switch */ 152 { .compat = "nxp,pca9848", 153 .data = &switch8_type }, 154 155 /* PCA9849 - 4 channel i2c mux */ 156 { .compat = "nxp,pca9849", 157 .data = &mux4_type }, 158 159 DEVICE_COMPAT_EOL 160 }; 161 162 struct pcaiicmux_softc { 163 struct iicmux_softc sc_iicmux; 164 165 i2c_addr_t sc_addr; 166 int sc_cur_value; 167 168 const struct pcaiicmux_type *sc_type; 169 struct fdtbus_gpio_pin *sc_reset_gpio; 170 171 bool sc_idle_disconnect; 172 173 struct pcaiicmux_bus_info { 174 uint8_t enable_value; 175 } sc_bus_info[PCAIICMUX_MAX_BUSSES]; 176 }; 177 178 static int 179 pcaiicmux_write(struct pcaiicmux_softc * const sc, uint8_t const val, 180 int const flags) 181 { 182 if ((int)val == sc->sc_cur_value) { 183 return 0; 184 } 185 sc->sc_cur_value = (int)val; 186 187 int const error = 188 iic_smbus_send_byte(sc->sc_iicmux.sc_i2c_parent, sc->sc_addr, val, 189 flags & ~I2C_F_SPEED); 190 if (error) { 191 sc->sc_cur_value = -1; 192 } 193 194 return error; 195 } 196 197 /*****************************************************************************/ 198 199 static void * 200 pcaiicmux_get_mux_info(struct iicmux_softc * const iicmux) 201 { 202 return container_of(iicmux, struct pcaiicmux_softc, sc_iicmux); 203 } 204 205 static void * 206 pcaiicmux_get_bus_info(struct iicmux_bus * const bus) 207 { 208 struct iicmux_softc * const iicmux = bus->mux; 209 struct pcaiicmux_softc * const sc = iicmux->sc_mux_data; 210 bus_addr_t addr; 211 int error; 212 213 if (bus->busidx >= sc->sc_type->nchannels) { 214 aprint_error_dev(iicmux->sc_dev, 215 "device tree error: bus index %d out of range\n", 216 bus->busidx); 217 return NULL; 218 } 219 220 struct pcaiicmux_bus_info * const bus_info = 221 &sc->sc_bus_info[bus->busidx]; 222 223 switch (devhandle_type(bus->devhandle)) { 224 case DEVHANDLE_TYPE_OF: 225 error = fdtbus_get_reg(devhandle_to_of(bus->devhandle), 226 0, &addr, NULL); 227 if (error) { 228 aprint_error_dev(iicmux->sc_dev, 229 "unable to get reg property for bus %d\n", 230 bus->busidx); 231 return NULL; 232 } 233 break; 234 #if NACPICA > 0 235 case DEVHANDLE_TYPE_ACPI: { 236 ACPI_INTEGER val; 237 ACPI_STATUS rv; 238 rv = acpi_eval_integer(devhandle_to_acpi(bus->devhandle), 239 "_ADR", &val); 240 if (ACPI_FAILURE(rv)) { 241 aprint_error_dev(iicmux->sc_dev, 242 "unable to evaluate _ADR for bus %d: %s\n", 243 bus->busidx, AcpiFormatException(rv)); 244 return NULL; 245 } 246 addr = (bus_addr_t)val; 247 } break; 248 #endif 249 default: 250 aprint_error_dev(iicmux->sc_dev, "unsupported handle type\n"); 251 return NULL; 252 } 253 254 if (addr >= sc->sc_type->nchannels) { 255 aprint_error_dev(iicmux->sc_dev, 256 "device tree error: reg property %llu out of range\n", 257 (unsigned long long)addr); 258 return NULL; 259 } 260 261 /* 262 * If it's a mux type, the enable value is the channel number 263 * (from the reg property) OR'd with the enable bit. 264 * 265 * If it's a switch type, the enable value is 1 << channel number 266 * (from the reg property). 267 */ 268 if (sc->sc_type->enable_bit) { 269 bus_info->enable_value = 270 (uint8_t)addr | sc->sc_type->enable_bit; 271 } else { 272 bus_info->enable_value = 1 << addr; 273 } 274 275 return bus_info; 276 } 277 278 static int 279 pcaiicmux_acquire_bus(struct iicmux_bus * const bus, int const flags) 280 { 281 struct pcaiicmux_softc * const sc = bus->mux->sc_mux_data; 282 struct pcaiicmux_bus_info * const bus_info = bus->bus_data; 283 int error; 284 285 error = pcaiicmux_write(sc, bus_info->enable_value, flags); 286 if (error) { 287 printf("%s: %s: pcaiicmux_write failed (error = %d)\n", 288 device_xname(sc->sc_iicmux.sc_dev), __func__, error); 289 } 290 return error; 291 } 292 293 static void 294 pcaiicmux_release_bus(struct iicmux_bus * const bus, int const flags) 295 { 296 struct pcaiicmux_softc * const sc = bus->mux->sc_mux_data; 297 298 if (sc->sc_idle_disconnect) { 299 int error; 300 301 error = pcaiicmux_write(sc, 0, flags); 302 if (error) { 303 printf("%s: %s: pcaiicmux_write failed (error = %d)\n", 304 device_xname(sc->sc_iicmux.sc_dev), __func__, 305 error); 306 } 307 } 308 } 309 310 static const struct iicmux_config pcaiicmux_config = { 311 .desc = "PCA954x", 312 .get_mux_info = pcaiicmux_get_mux_info, 313 .get_bus_info = pcaiicmux_get_bus_info, 314 .acquire_bus = pcaiicmux_acquire_bus, 315 .release_bus = pcaiicmux_release_bus, 316 }; 317 318 /*****************************************************************************/ 319 320 static const struct pcaiicmux_type * 321 pcaiicmux_type_by_compat(const struct i2c_attach_args * const ia) 322 { 323 const struct pcaiicmux_type *type = NULL; 324 const struct device_compatible_entry *dce; 325 326 if ((dce = iic_compatible_lookup(ia, compat_data)) != NULL) 327 type = dce->data; 328 329 return type; 330 } 331 332 static int 333 pcaiicmux_match(device_t parent, cfdata_t cf, void *aux) 334 { 335 struct i2c_attach_args * const ia = aux; 336 int match_result; 337 338 if (iic_use_direct_match(ia, cf, compat_data, &match_result)) { 339 return match_result; 340 } 341 342 /* This device is direct-config only. */ 343 344 return 0; 345 } 346 347 static void 348 pcaiicmux_attach(device_t parent, device_t self, void *aux) 349 { 350 struct pcaiicmux_softc * const sc = device_private(self); 351 struct i2c_attach_args * const ia = aux; 352 devhandle_t devhandle = device_handle(self); 353 int error; 354 355 sc->sc_iicmux.sc_dev = self; 356 sc->sc_iicmux.sc_config = &pcaiicmux_config; 357 sc->sc_iicmux.sc_i2c_parent = ia->ia_tag; 358 sc->sc_addr = ia->ia_addr; 359 360 sc->sc_type = pcaiicmux_type_by_compat(ia); 361 KASSERT(sc->sc_type != NULL); 362 363 aprint_naive("\n"); 364 aprint_normal(": PCA954x I2C %s\n", 365 sc->sc_type->enable_bit ? "mux" : "switch"); 366 367 if (devhandle_type(devhandle) == DEVHANDLE_TYPE_OF) { 368 const int phandle = devhandle_to_of(devhandle); 369 if (of_hasprop(phandle, "i2c-mux-idle-disconnect")) { 370 sc->sc_idle_disconnect = true; 371 } 372 373 /* Reset the mux if a reset GPIO is specified. */ 374 sc->sc_reset_gpio = fdtbus_gpio_acquire(phandle, "reset-gpios", 375 GPIO_PIN_OUTPUT); 376 if (sc->sc_reset_gpio) { 377 fdtbus_gpio_write(sc->sc_reset_gpio, 1); 378 delay(10); 379 fdtbus_gpio_write(sc->sc_reset_gpio, 0); 380 delay(10); 381 } 382 } 383 384 /* Force the mux into a disconnected state. */ 385 sc->sc_cur_value = -1; 386 error = iic_acquire_bus(ia->ia_tag, 0); 387 if (error) { 388 aprint_error_dev(self, 389 "failed to acquire I2C bus (error = %d)\n", error); 390 return; 391 } 392 error = pcaiicmux_write(sc, 0, 0); 393 iic_release_bus(ia->ia_tag, 0); 394 if (error) { 395 aprint_error_dev(self, 396 "failed to set mux to disconnected state (error = %d)\n", 397 error); 398 return; 399 } 400 401 iicmux_attach(&sc->sc_iicmux); 402 } 403 404 CFATTACH_DECL_NEW(pcaiicmux, sizeof(struct pcaiicmux_softc), 405 pcaiicmux_match, pcaiicmux_attach, NULL, NULL); 406
Indexes created Tue Sep 23 02:09:52 GMT 2025