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    Searched refs:gvt_dbg_core (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
debug.h 40 #define gvt_dbg_core(fmt, args...) \ macro
vgpu.c 70 gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
71 gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
73 gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
75 gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
163 gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u weight %u res %s\n",
204 gvt_dbg_core("update type[%d]: %s avail %u low %u high %u fence %u\n",
370 gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
540 gvt_dbg_core("------------------------------------------\n");
541 gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
581 gvt_dbg_core("reset vgpu%d done\n", vgpu->id)
    [all...]
firmware.c 201 gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
250 gvt_dbg_core("request hw state firmware %s...\n", path);
258 gvt_dbg_core("success.\n");
264 gvt_dbg_core("verified.\n");
gvt.c 218 gvt_dbg_core("service thread start\n");
321 gvt_dbg_core("init gvt device\n");
385 gvt_dbg_core("gvt device initialization is done\n");
444 gvt_dbg_core("Running with hypervisor %s in host mode\n",
fb_decoder.c 176 gvt_dbg_core("skl: unsupported bpp:%d\n", bpp);
179 gvt_dbg_core("skl: unsupported tile format:%x\n",
372 gvt_dbg_core("alpha_plane=0x%x, alpha_force=0x%x\n",
opregion.c 233 gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
305 gvt_dbg_core("emulate opregion from kernel\n");
340 gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);
mmio_context.c 229 gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",
259 gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",
286 gvt_dbg_core("add lri reg pair 0x%x:0x%x in inhibit ctx, vgpu:%d, rind_id:%d\n",
394 gvt_dbg_core("invalidate TLB for ring %d\n", ring_id);
aperture_gm.c 98 gvt_dbg_core("vgpu%d: alloc low GM start %llx size %llx\n", vgpu->id,
101 gvt_dbg_core("vgpu%d: alloc high GM start %llx size %llx\n", vgpu->id,
sched_policy.c 435 gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
459 gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
scheduler.c 994 gvt_dbg_core("workload thread for ring %d started\n", ring_id);
1079 gvt_dbg_core("clean workload scheduler\n");
1097 gvt_dbg_core("init workload scheduler\n");
1337 gvt_dbg_core("vgpu%d: remove submission ops\n", vgpu->id);
1349 gvt_dbg_core("vgpu%d: activate ops [ %s ]\n",
interrupt.c 432 gvt_dbg_core("vgpu%d: IRQ receive event %d (%s)\n",
697 gvt_dbg_core("init irq framework\n");
kvmgt.c 682 gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
1286 gvt_dbg_core("vgpu%d ioctl, cmd: %d\n", vgpu->id, cmd);
1375 gvt_dbg_core("get region info bar:%d\n", info.index);
1384 gvt_dbg_core("get region info index:%d\n", info.index);
dmabuf.c 248 gvt_dbg_core("invalid drm_format_mod %llx for tiling\n",
handlers.c 227 gvt_dbg_core("vgpu%d: ips enabled\n", vgpu->id);
229 gvt_dbg_core("vgpu%d: ips disabled\n", vgpu->id);
1100 gvt_dbg_core("vgpu%d: %s VGA mode\n", vgpu->id,
1470 gvt_dbg_core("VM(%d) write %x to mailbox, return data0 %x\n",
1751 gvt_dbg_core("EXECLIST %s on ring %d\n",
gtt.c 2130 gvt_dbg_core("GMA 0x%lx is not present\n", gma);
2693 gvt_dbg_core("init gtt\n");

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