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    Searched refs:hpll (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 435 * Certain platforms also have a deeper HPLL SR mode. Fortunately the
436 * HPLL SR mode depends on CxSR itself, so we don't have to hand hold
437 * the hardware w.r.t. HPLL SR when writing to plane registers.
917 /* Display HPLL off SR */
926 /* cursor HPLL off SR */
975 FW_WM(wm->hpll.fbc, FBC_HPLL_SR) |
982 FW_WM(wm->hpll.cursor, HPLL_CURSOR) |
983 FW_WM(wm->hpll.plane, HPLL_SR));
1148 * the HPLL watermark, which seems a little strange.
1149 * Let's use 32bpp for the HPLL watermark as well
    [all...]
i915_drv.h 787 struct g4x_sr_wm hpll; member in struct:g4x_wm_values
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display_types.h 712 struct g4x_sr_wm hpll; member in struct:g4x_wm_state
intel_display.c 194 /* returns HPLL frequency in kHz */
225 int hpll; local in function:vlv_get_cck_clock_hpll
232 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq);
236 return hpll;

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