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  /src/external/mit/xorg/server/drivers/xf86-video-i128/
Makefile 3 DRIVER= xf86-video-i128
8 MAN= i128.4
  /src/external/mit/xorg/server/drivers/
Makefile 35 xf86-video-i128 \
89 xf86-video-i128 \
149 xf86-video-i128 \
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 290 if (RetVT == MVT::i128)
297 if (RetVT == MVT::i128)
304 if (RetVT == MVT::i128)
311 if (RetVT == MVT::i128)
318 if (RetVT == MVT::i128)
325 if (RetVT == MVT::i128)
339 if (RetVT == MVT::i128)
346 if (RetVT == MVT::i128)
353 if (RetVT == MVT::i128)
360 if (RetVT == MVT::i128)
    [all...]
ValueTypes.cpp 192 case MVT::i128: return IntegerType::get(Context, 128);
  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
MachineValueType.h 45 i128 = 7, // This is a 128 bit integer value
48 LAST_INTEGER_VALUETYPE = i128,
119 v1i128 = 68, // 1 x i128
591 case v1i128: return i128;
911 case i128:
1125 return MVT::i128;
1196 case MVT::i128:
  /src/external/mit/xorg/server/xorg-server/hw/xfree86/common/
Makefile 91 apm i128
  /src/external/mit/xorg/server/xorg-server.old/hw/xfree86/common/
Makefile 102 apm i128
  /src/external/gpl3/gdb/dist/gdb/
rust-parse.c 1036 type = get_type ("i128");
  /src/external/gpl3/gdb.old/dist/gdb/
rust-parse.c 1039 type = get_type ("i128");
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 445 setOperationAction(ISD::FP_TO_SINT, MVT::i128, Custom);
448 setOperationAction(ISD::STRICT_FP_TO_SINT, MVT::i128, Custom);
451 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom);
454 setOperationAction(ISD::STRICT_FP_TO_UINT, MVT::i128, Custom);
457 setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom);
460 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i128, Custom);
463 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom);
466 setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::i128, Custom);
528 setOperationAction(ISD::CTPOP, MVT::i128, Custom);
720 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i128, Custom)
    [all...]
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenTarget.cpp 66 case MVT::i128: return "MVT::i128";
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp 3314 else if (VT == MVT::i128)
3719 else if (VT == MVT::i128)
3797 else if (VT == MVT::i128)
3807 else if (VT == MVT::i128)
3818 else if (VT == MVT::i128)
3910 else if (VT == MVT::i128)
3999 else if (VT == MVT::i128)
4067 else if (VT == MVT::i128)
4094 else if (VT == MVT::i128)
LegalizeFloatTypes.cpp 1673 } else if (SrcVT.bitsLE(MVT::i128)) {
1674 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1697 // FIXME: For unsigned i128 to ppc_fp128 conversion, we need to carefully
1718 case MVT::i128:
LegalizeDAG.cpp 2084 case MVT::i128: LC = Call_I128; break;
2141 case MVT::i128: LC= isSigned ? RTLIB::SDIVREM_I128:RTLIB::UDIVREM_I128; break;
4346 case MVT::i128:
SelectionDAG.cpp 4634 if (VT == MVT::f128 && C->getValueType(0) == MVT::i128)
TargetLowering.cpp 8439 else if (WideVT == MVT::i128)
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 1076 // Full register, just bitconvert into i128 -- We will lower this into
1079 IReg, MVT::i128, CCValAssign::BCvt);
1156 // fixupVariableFloatArgs() may create bitcasts from f128 to i128. But
1157 // SPARC does not support i128 natively. Lower it into two i64, see below.
1159 || VA.getLocVT() != MVT::i128)
1166 && VA.getLocVT() == MVT::i128) {
2947 EVT WideVT = MVT::i128;
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 249 // Even though i128 is not a legal type, we still need to custom lower
251 setOperationAction(ISD::ATOMIC_LOAD, MVT::i128, Custom);
252 setOperationAction(ISD::ATOMIC_STORE, MVT::i128, Custom);
258 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, MVT::i128, Custom);
1137 else if (VT == MVT::i128)
1144 else if (VT == MVT::i128)
1180 if (VT == MVT::i128)
1458 // If the original argument was split (e.g. i128), we need
1605 // If the original argument was split (e.g. i128), we need
1742 // i128 is not a legal type
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMFastISel.cpp 1697 else if (VT == MVT::i128)
1726 else if (VT == MVT::i128)
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 687 // 64-bit PowerPC wants to expand i128 shifts itself.
1174 setOperationAction(ISD::BITCAST, MVT::i128, Custom);
9653 /// a multiple of 8. Otherwise convert it to a scalar rotation(i128)
9672 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0);
9673 SDValue SHLOp = DAG.getNode(ISD::SHL, dl, MVT::i128, ArgVal,
9675 SDValue SRLOp = DAG.getNode(ISD::SRL, dl, MVT::i128, ArgVal,
9677 SDValue OROp = DAG.getNode(ISD::OR, dl, MVT::i128, SHLOp, SRLOp);
13909 // Look for the pattern of a load from a narrow width to i128, feeding
13934 // Ensure that the load from the narrow width is being zero extended to i128.
13988 // is a load from <valid narrow width> to i128
    [all...]
  /src/share/mk/
bsd.own.mk 1958 geode glint i128 i740 igs imstt intel intel-old intel-2014 \
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUISelDAGToDAG.cpp 782 if (N->getValueType(0) == MVT::i128) {
SIISelLowering.cpp 11555 // We actually support i128, i16 and f16 as inline parameters
11557 if (RC && (isTypeLegal(VT) || VT.SimpleTy == MVT::i128 ||
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLoweringHVX.cpp 80 setOperationAction(ISD::BITCAST, MVT::i128, Custom);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 516 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, MVT::i128, Custom);
1979 setOperationAction(ISD::SDIV, MVT::i128, Custom);
1980 setOperationAction(ISD::UDIV, MVT::i128, Custom);
1981 setOperationAction(ISD::SREM, MVT::i128, Custom);
1982 setOperationAction(ISD::UREM, MVT::i128, Custom);
18443 // elements wider than 64 bits, but it might be interesting to form i128
    [all...]

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