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    Searched refs:i915_ggtt_offset (Results 1 - 24 of 24) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_gt.h 60 return i915_ggtt_offset(gt->scratch) + field;
selftest_mocs.c 229 offset = i915_ggtt_offset(vma);
234 offset -= i915_ggtt_offset(vma);
intel_timeline.c 325 i915_ggtt_offset(tl->hwsp_ggtt) +
479 tl->hwsp_offset += i915_ggtt_offset(vma);
537 *hwsp = i915_ggtt_offset(cl->hwsp->vma) +
intel_renderstate.c 116 so->batch_offset = i915_ggtt_offset(so->vma);
intel_engine_cs.c 1396 i915_ggtt_offset(rq->ring->vma),
1413 i915_ggtt_offset(rq->ring->vma),
1527 i915_ggtt_offset(rq->ring->vma));
1692 return ring == i915_ggtt_offset(rq->ring->vma);
intel_ring_submission.c 605 set_hwsp(engine, i915_ggtt_offset(engine->status_page.vma));
699 ENGINE_WRITE(engine, RING_START, i915_ggtt_offset(ring->vma));
726 i915_ggtt_offset(ring->vma));
1474 *cs++ = i915_ggtt_offset(engine->kernel_context->state) |
1481 *cs++ = i915_ggtt_offset(rq->context->state) | flags;
selftest_lrc.c 410 *cs++ = i915_ggtt_offset(vma) + 4 * idx;
415 *cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1);
484 *cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1);
879 *cs++ = i915_ggtt_offset(vma);
890 *cs++ = i915_ggtt_offset(vma);
929 *cs++ = i915_ggtt_offset(vma);
3099 *cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32);
3878 *cs++ = i915_ggtt_offset(scratch) + RING_START_IDX * sizeof(u32);
3881 expected[RING_START_IDX] = i915_ggtt_offset(ce->ring->vma);
3885 *cs++ = i915_ggtt_offset(scratch) + RING_TAIL_IDX * sizeof(u32)
    [all...]
intel_lrc.c 321 return (i915_ggtt_offset(engine->status_page.vma) +
523 desc |= i915_ggtt_offset(ce->state); /* bits 12-31 */
1165 if (regs[CTX_RING_START] != i915_ggtt_offset(ring->vma)) {
1169 i915_ggtt_offset(ring->vma));
1170 regs[CTX_RING_START] = i915_ggtt_offset(ring->vma);
2941 regs[CTX_RING_START] = i915_ggtt_offset(ring->vma);
3434 i915_ggtt_offset(engine->status_page.vma));
4518 const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma);
4525 const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma);
gen6_ppgtt.c 345 u32 ggtt_offset = i915_ggtt_offset(vma) / I915_GTT_PAGE_SIZE;
selftest_workarounds.c 165 *cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
intel_workarounds.c 1588 *cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dsb.c 323 I915_WRITE(DSB_HEAD(pipe, dsb->id), i915_ggtt_offset(dsb->vma));
335 i915_ggtt_offset(dsb->vma), tail);
336 I915_WRITE(DSB_TAIL(pipe, dsb->id), i915_ggtt_offset(dsb->vma) + tail);
intel_overlay.c 825 iowrite32(i915_ggtt_offset(vma) + params->offset_Y, &regs->OBUF_0Y);
842 iowrite32(i915_ggtt_offset(vma) + params->offset_U,
844 iowrite32(i915_ggtt_offset(vma) + params->offset_V,
1336 overlay->flip_addr = i915_ggtt_offset(vma);
intel_fbdev.c 322 i915_ggtt_offset(vma));
intel_display_types.h 1630 return i915_ggtt_offset(state->vma);
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/
i915_gem_coherency.c 224 *cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset);
225 *cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset);
230 *cs++ = i915_ggtt_offset(vma) + offset;
234 *cs++ = i915_ggtt_offset(vma) + offset;
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/
intel_guc.h 117 u32 offset = i915_ggtt_offset(vma);
  /src/sys/external/bsd/drm2/dist/drm/i915/selftests/
i915_perf.c 162 i915_ggtt_offset(stream->noa_wait), 0,
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_vma.h 124 static inline u32 i915_ggtt_offset(const struct i915_vma *vma) function in typeref:typename:u32
i915_perf.c 558 u32 gtt_offset = i915_ggtt_offset(vma);
729 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1052 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1387 stream->specific_ctx_id = i915_ggtt_offset(ce->state);
1527 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1575 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1631 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
1869 *cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4;
1906 *cs++ = i915_ggtt_offset(vma) + (jump - batch) * 4;
2015 *cs++ = i915_ggtt_offset(stream->noa_wait)
    [all...]
i915_gem.c 441 node.start = i915_ggtt_offset(vma);
644 node.start = i915_ggtt_offset(vma);
i915_gpu_error.c 1229 erq->start = i915_ggtt_offset(request->ring->vma);
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
scheduler.c 496 bb->bb_start_cmd_va[1] = i915_ggtt_offset(bb->vma);
564 wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma);
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_context.c 1255 offset = i915_ggtt_offset(ce->state) +

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