| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_cz_ih.c | 67 u32 ih_cntl = RREG32(mmIH_CNTL); local
70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
72 WREG32(mmIH_CNTL, ih_cntl);
87 u32 ih_cntl = RREG32(mmIH_CNTL); local
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
92 WREG32(mmIH_CNTL, ih_cntl);
114 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
| amdgpu_iceland_ih.c | 67 u32 ih_cntl = RREG32(mmIH_CNTL); local
70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
72 WREG32(mmIH_CNTL, ih_cntl);
87 u32 ih_cntl = RREG32(mmIH_CNTL); local
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
92 WREG32(mmIH_CNTL, ih_cntl);
115 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
| amdgpu_cik_ih.c | 67 u32 ih_cntl = RREG32(mmIH_CNTL); local
70 ih_cntl |= IH_CNTL__ENABLE_INTR_MASK;
72 WREG32(mmIH_CNTL, ih_cntl);
87 u32 ih_cntl = RREG32(mmIH_CNTL); local
90 ih_cntl &= ~IH_CNTL__ENABLE_INTR_MASK;
92 WREG32(mmIH_CNTL, ih_cntl);
115 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
150 /* Default settings for IH_CNTL (disabled at first) */
151 ih_cntl = (0x10 << IH_CNTL__MC_WRREQ_CREDIT__SHIFT) |
156 ih_cntl |= IH_CNTL__RPTR_REARM_MASK
[all...] |
| amdgpu_si_ih.c | 40 u32 ih_cntl = RREG32(IH_CNTL); local
43 ih_cntl |= ENABLE_INTR;
45 WREG32(IH_CNTL, ih_cntl);
53 u32 ih_cntl = RREG32(IH_CNTL); local
56 ih_cntl &= ~ENABLE_INTR;
58 WREG32(IH_CNTL, ih_cntl);
69 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_r600.c | 3628 u32 ih_cntl = RREG32(IH_CNTL); local
3631 ih_cntl |= ENABLE_INTR;
3633 WREG32(IH_CNTL, ih_cntl);
3641 u32 ih_cntl = RREG32(IH_CNTL); local
3644 ih_cntl &= ~ENABLE_INTR;
3646 WREG32(IH_CNTL, ih_cntl);
3711 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
| radeon_si.c | 5929 u32 ih_cntl = RREG32(IH_CNTL); local
5932 ih_cntl |= ENABLE_INTR;
5934 WREG32(IH_CNTL, ih_cntl);
5942 u32 ih_cntl = RREG32(IH_CNTL); local
5945 ih_cntl &= ~ENABLE_INTR;
5947 WREG32(IH_CNTL, ih_cntl);
5989 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
| radeon_cik.c | 6842 u32 ih_cntl = RREG32(IH_CNTL); local
6845 ih_cntl |= ENABLE_INTR;
6847 WREG32(IH_CNTL, ih_cntl);
6862 u32 ih_cntl = RREG32(IH_CNTL); local
6865 ih_cntl &= ~ENABLE_INTR;
6867 WREG32(IH_CNTL, ih_cntl);
6967 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local
[all...] |
