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    Searched refs:interrupt_status_offsets (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 95 } interrupt_status_offsets[] = { { variable in typeref:typename:const struct __anon55e5877b0108[]
3237 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);
3242 if (disp_int & interrupt_status_offsets[crtc].vblank)
3254 if (disp_int & interrupt_status_offsets[crtc].vline)
3283 disp_int = RREG32(interrupt_status_offsets[hpd].reg);
3284 mask = interrupt_status_offsets[hpd].hpd;
amdgpu_dce_v11_0.c 97 } interrupt_status_offsets[] = { { variable in typeref:typename:const struct __anon55f79ffc0108[]
3363 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);
3369 if (disp_int & interrupt_status_offsets[crtc].vblank)
3381 if (disp_int & interrupt_status_offsets[crtc].vline)
3410 disp_int = RREG32(interrupt_status_offsets[hpd].reg);
3411 mask = interrupt_status_offsets[hpd].hpd;
amdgpu_dce_v6_0.c 98 } interrupt_status_offsets[6] = { { variable in typeref:typename:const struct __anonadb87c700108[6]
2958 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);
2964 if (disp_int & interrupt_status_offsets[crtc].vblank)
2975 if (disp_int & interrupt_status_offsets[crtc].vline)
3079 disp_int = RREG32(interrupt_status_offsets[hpd].reg);
3080 mask = interrupt_status_offsets[hpd].hpd;
amdgpu_dce_v8_0.c 95 } interrupt_status_offsets[6] = { { variable in typeref:typename:const struct __anonaddcad720108[6]
3048 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg);
3054 if (disp_int & interrupt_status_offsets[crtc].vblank)
3065 if (disp_int & interrupt_status_offsets[crtc].vline)
3169 disp_int = RREG32(interrupt_status_offsets[hpd].reg);
3170 mask = interrupt_status_offsets[hpd].hpd;

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