| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_atombios_dp.c | 270 unsigned lane_num, i, max_pix_clock; local in function:amdgpu_atombios_dp_get_dp_link_config
274 for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
275 max_pix_clock = (lane_num * 270000 * 8) / bpp;
277 *dp_lanes = lane_num;
284 for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
285 max_pix_clock = (lane_num * link_rates[i] * 8) / bpp
[all...] |
| atombios_encoders.h | 53 uint8_t lane_num, uint8_t lane_set);
|
| amdgpu_atombios_encoders.c | 768 uint8_t lane_num, uint8_t lane_set)
848 args.v1.asMode.ucLaneSel = lane_num;
905 args.v2.asMode.ucLaneSel = lane_num;
947 args.v3.asMode.ucLaneSel = lane_num;
1006 args.v4.asMode.ucLaneSel = lane_num;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_atombios_dp.c | 327 unsigned lane_num, i, max_pix_clock; local in function:radeon_dp_get_dp_link_config
331 for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
332 max_pix_clock = (lane_num * 270000 * 8) / bpp;
334 *dp_lanes = lane_num;
341 for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {
342 max_pix_clock = (lane_num * link_rates[i] * 8) / bpp
[all...] |
| radeon_atombios_encoders.c | 1021 atombios_dig_transmitter_setup2(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set, int fe)
1102 args.v1.asMode.ucLaneSel = lane_num;
1159 args.v2.asMode.ucLaneSel = lane_num;
1201 args.v3.asMode.ucLaneSel = lane_num;
1260 args.v4.asMode.ucLaneSel = lane_num;
1388 atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set)
1390 atombios_dig_transmitter_setup2(encoder, action, lane_num, lane_set, -1);
|
| radeon_mode.h | 771 int action, uint8_t lane_num,
774 int action, uint8_t lane_num,
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