| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dce_calcs.h | 415 struct bw_fixed lb_partitions[maximum_number_of_surfaces]; member in struct:bw_calcs_data
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dce_calcs.c | 563 data->lb_partitions[i] = bw_floor2(bw_div(data->lb_size_per_component[i], data->lb_line_pitch), bw_int_to_fixed(1));
571 data->lb_partitions[i] = bw_min2(data->lb_partitions_max[i], data->lb_partitions[i]);
572 if (bw_mtn(bw_add(data->v_taps[i], bw_int_to_fixed(1)), data->lb_partitions[i])) {
815 else if ((((dceip->underlay_downscale_prefetch_enabled == 1 && surface_type[i] != bw_def_graphics) || surface_type[i] == bw_def_graphics) && (bw_mtn(data->lb_partitions[i], bw_add(data->v_taps[i], bw_ceil2(data->vsr[i], bw_int_to_fixed(1))))))) {
1309 data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(2)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
1311 data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(1)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
1934 data->stutter_refresh_duration[i] = bw_sub(bw_mul(bw_div(bw_div(bw_mul(bw_div(bw_div(data->adjusted_data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_rounded_up_to_chunks[i]), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]), data->compression_rate[i]), bw_max2(bw_int_to_fixed(0), bw_sub(data->stutter_exit_watermark[i], bw_div(bw_mul((bw_sub(data->lb_partitions[i], bw_int_to_fixed(1))), data->h_total[i]), data->pixel_rate[i]))));
|
| calcs_logger.h | 460 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] lb_partitions[%d]:%d",
461 i, bw_fixed_to_int(data->lb_partitions[i]));
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| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dce_v10_0.c | 996 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce_v10_0_check_latency_hiding
1006 if (lb_partitions <= (wm->vtaps + 1))
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| amdgpu_dce_v11_0.c | 1022 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce_v11_0_check_latency_hiding
1032 if (lb_partitions <= (wm->vtaps + 1))
|
| amdgpu_dce_v6_0.c | 794 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce_v6_0_check_latency_hiding
804 if (lb_partitions <= (wm->vtaps + 1))
|
| amdgpu_dce_v8_0.c | 931 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce_v8_0_check_latency_hiding
941 if (lb_partitions <= (wm->vtaps + 1))
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen.c | 2133 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:evergreen_check_latency_hiding
2143 if (lb_partitions <= (wm->vtaps + 1))
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| radeon_si.c | 2281 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce6_check_latency_hiding
2291 if (lb_partitions <= (wm->vtaps + 1))
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| radeon_cik.c | 9277 u32 lb_partitions = wm->lb_size / wm->src_width; local in function:dce8_check_latency_hiding
9287 if (lb_partitions <= (wm->vtaps + 1))
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