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  /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
soc15_int.h 37 #define SOC15_CLIENT_ID_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[0]) & 0xff)
38 #define SOC15_SOURCE_ID_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[0]) >> 8 & 0xff)
39 #define SOC15_RING_ID_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[0]) >> 16 & 0xff)
40 #define SOC15_VMID_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[0]) >> 24 & 0xf)
41 #define SOC15_VMID_TYPE_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[0]) >> 31 & 0x1)
42 #define SOC15_PASID_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[3]) & 0xffff)
43 #define SOC15_CONTEXT_ID0_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[4]))
44 #define SOC15_CONTEXT_ID1_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[5]))
45 #define SOC15_CONTEXT_ID2_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[6]))
46 #define SOC15_CONTEXT_ID3_FROM_IH_ENTRY(entry) (le32_to_cpu(entry[7])
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_ucode.c 40 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
41 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
46 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
47 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
49 le32_to_cpu(hdr->ucode_array_offset_bytes));
50 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
66 le32_to_cpu(mc_hdr->io_debug_size_bytes));
68 le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
86 DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
93 DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_offset_bytes))
    [all...]
amdgpu_rlc.c 207 le32_to_cpu(hdr->header.ucode_array_offset_bytes));
208 table_offset = le32_to_cpu(hdr->jt_offset);
209 table_size = le32_to_cpu(hdr->jt_size);
215 le32_to_cpu(hdr->header.ucode_array_offset_bytes));
216 table_offset = le32_to_cpu(hdr->jt_offset);
217 table_size = le32_to_cpu(hdr->jt_size);
223 le32_to_cpu(hdr->header.ucode_array_offset_bytes));
224 table_offset = le32_to_cpu(hdr->jt_offset);
225 table_size = le32_to_cpu(hdr->jt_size);
231 le32_to_cpu(hdr->header.ucode_array_offset_bytes))
    [all...]
amdgpu_discovery.c 189 if (le32_to_cpu(bhdr->binary_signature) != BINARY_SIGNATURE) {
212 if (le32_to_cpu(ihdr->signature) != DISCOVERY_TABLE_SIGNATURE) {
309 ip->base_address[k] = le32_to_cpu(ip->base_address[k]);
392 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->gc_num_se);
393 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->gc_num_wgp0_per_sa) +
394 le32_to_cpu(gc_info->gc_num_wgp1_per_sa));
395 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->gc_num_sa_per_se);
396 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->gc_num_rb_per_se);
397 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->gc_num_gl2c);
398 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->gc_num_gprs)
    [all...]
amdgpu_psp_v10_0.c 84 adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version);
85 adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version);
86 adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
88 le32_to_cpu(hdr->header.ucode_array_offset_bytes);
106 le32_to_cpu(ta_hdr->ta_hdcp_ucode_version);
108 le32_to_cpu(ta_hdr->ta_hdcp_size_bytes);
111 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
113 adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
116 le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
118 le32_to_cpu(ta_hdr->ta_dtm_size_bytes)
    [all...]
amdgpu_mes_v10_1.c 98 adev->mes.ucode_fw_version = le32_to_cpu(mes_hdr->mes_ucode_version);
100 le32_to_cpu(mes_hdr->mes_ucode_data_version);
102 le32_to_cpu(mes_hdr->mes_uc_start_addr_lo) |
103 ((uint64_t)(le32_to_cpu(mes_hdr->mes_uc_start_addr_hi)) << 32);
105 le32_to_cpu(mes_hdr->mes_data_start_addr_lo) |
106 ((uint64_t)(le32_to_cpu(mes_hdr->mes_data_start_addr_hi)) << 32);
128 le32_to_cpu(mes_hdr->mes_ucode_offset_bytes));
129 fw_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);
160 le32_to_cpu(mes_hdr->mes_ucode_data_offset_bytes));
161 fw_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes)
    [all...]
amdgpu_psp_v11_0.c 122 adev->psp.sos_fw_version = le32_to_cpu(sos_hdr->header.ucode_version);
123 adev->psp.sos_feature_version = le32_to_cpu(sos_hdr->ucode_feature_version);
124 adev->psp.sos_bin_size = le32_to_cpu(sos_hdr->sos_size_bytes);
125 adev->psp.sys_bin_size = le32_to_cpu(sos_hdr->sos_offset_bytes);
127 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes);
129 le32_to_cpu(sos_hdr->sos_offset_bytes);
132 adev->psp.toc_bin_size = le32_to_cpu(sos_hdr_v1_1->toc_size_bytes);
134 le32_to_cpu(sos_hdr_v1_1->toc_offset_bytes);
135 adev->psp.kdb_bin_size = le32_to_cpu(sos_hdr_v1_1->kdb_size_bytes);
137 le32_to_cpu(sos_hdr_v1_1->kdb_offset_bytes)
    [all...]
amdgpu_atomfirmware.c 49 if (le32_to_cpu(firmware_info->firmware_capability) &
69 le32_to_cpu(firmware_info->bios_scratch_reg_startaddr);
86 le32_to_cpu(firmware_usage->start_address_in_kb),
90 start_addr = le32_to_cpu(firmware_usage->start_address_in_kb);
301 (le32_to_cpu(umc_info->v31.umc_config) &
335 (le32_to_cpu(firmware_info->v31.firmware_capability) &
365 le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz);
367 le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz);
374 le32_to_cpu(firmware_info->v31.firmware_capability);
388 spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz)
    [all...]
amdgpu_navi10_ih.c 219 wptr = le32_to_cpu(*ih->wptr_cpu);
264 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
265 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
266 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
267 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
268 dw[4] = le32_to_cpu(ih->ring[ring_index + 4]);
269 dw[5] = le32_to_cpu(ih->ring[ring_index + 5]);
270 dw[6] = le32_to_cpu(ih->ring[ring_index + 6]);
271 dw[7] = le32_to_cpu(ih->ring[ring_index + 7]);
amdgpu_cik_ih.c 197 wptr = le32_to_cpu(*ih->wptr_cpu);
254 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
255 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
256 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
257 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
amdgpu_si_ih.c 115 wptr = le32_to_cpu(*ih->wptr_cpu);
136 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
137 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
138 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
139 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
amdgpu_cgs.c 229 data_size = le32_to_cpu(header->header.ucode_size_bytes);
233 gpu_addr += ALIGN(le32_to_cpu(header->header.ucode_size_bytes), PAGE_SIZE);
234 data_size = le32_to_cpu(header->jt_size) << 2;
240 info->version = (uint16_t)le32_to_cpu(header->header.ucode_version);
243 info->image_size = le32_to_cpu(header->jt_offset) << 2;
246 info->feature_version = (uint16_t)le32_to_cpu(header->ucode_feature_version);
465 ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);
471 adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);
472 ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
473 ucode_start_address = le32_to_cpu(hdr->ucode_start_addr)
    [all...]
amdgpu_psp_v3_1.c 94 adev->psp.sos_fw_version = le32_to_cpu(hdr->header.ucode_version);
95 adev->psp.sos_feature_version = le32_to_cpu(hdr->ucode_feature_version);
96 adev->psp.sos_bin_size = le32_to_cpu(hdr->sos_size_bytes);
97 adev->psp.sys_bin_size = le32_to_cpu(hdr->header.ucode_size_bytes) -
98 le32_to_cpu(hdr->sos_size_bytes);
100 le32_to_cpu(hdr->header.ucode_array_offset_bytes);
102 le32_to_cpu(hdr->sos_offset_bytes);
114 adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version);
115 adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version);
116 adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes)
    [all...]
amdgpu_si_smc.c 224 adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);
225 ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);
226 ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
228 (adev->pm.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
amdgpu_uvd.h 39 (AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(((const struct common_firmware_header *)(adev)->uvd.fw->data)->ucode_size_bytes) + \
amdgpu_cz_ih.c 199 wptr = le32_to_cpu(*ih->wptr_cpu);
233 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
234 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
235 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
236 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
amdgpu_iceland_ih.c 199 wptr = le32_to_cpu(*ih->wptr_cpu);
233 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
234 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
235 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
236 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ucode.c 38 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
39 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
44 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
45 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
47 le32_to_cpu(hdr->ucode_array_offset_bytes));
48 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
64 le32_to_cpu(mc_hdr->io_debug_size_bytes));
66 le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
84 DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
103 le32_to_cpu(gfx_hdr->ucode_feature_version))
    [all...]
radeon_vce_v1_0.c 186 for (i = 0; i < le32_to_cpu(sign->num); ++i) {
187 if (le32_to_cpu(sign->val[i].chip_id) == chip_id)
191 if (i == le32_to_cpu(sign->num))
199 data[4] = cpu_to_le32(le32_to_cpu(sign->len) + 64);
204 data += (le32_to_cpu(sign->len) + 64) / 4;
210 rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_ppatomfwctrl.c 136 le32_to_cpu(voltage_object->gpio_voltage_obj.
142 le32_to_cpu(
271 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz);
272 dividers->ulDid = le32_to_cpu(pll_output->dfs_did);
273 dividers->ulPll_fb_mult = le32_to_cpu(pll_output->pll_fb_mult);
274 dividers->ulPll_ss_fbsmult = le32_to_cpu(pll_output->pll_ss_fbsmult);
302 param->ulMaxVddc = le32_to_cpu(profile->maxvddc);
303 param->ulMinVddc = le32_to_cpu(profile->minvddc);
305 le32_to_cpu(profile->avfs_meannsigma_acontant0);
307 le32_to_cpu(profile->avfs_meannsigma_acontant1)
    [all...]
amdgpu_ppatomctrl.c 346 le32_to_cpu(mpll_parameters.ulClock.ulClock);
369 dividers->real_clock = le32_to_cpu(pll_parameters.ulClock);
395 le32_to_cpu(pll_patameters.ulClock.ulClock);
465 le32_to_cpu(pll_patameters.ulClock.ulClock);
561 le32_to_cpu(voltage_object->asGpioVoltageObj.asVolGpioLut[i].ulVoltageId);
565 le32_to_cpu(voltage_object->asGpioVoltageObj.ulGpioMaskVal);
703 fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM1), 1000);
707 fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM2), 1000);
711 fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM3), 1000);
715 fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM4), 1000)
    [all...]
amdgpu_process_pptables_v1_0.c 224 = le32_to_cpu(atom_ppm_table->ulPlatformTDP);
226 = le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDP);
228 = le32_to_cpu(atom_ppm_table->ulPlatformTDC);
230 = le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDC);
232 = le32_to_cpu(atom_ppm_table->ulApuTDP);
234 = le32_to_cpu(atom_ppm_table->ulDGpuTDP);
236 = le32_to_cpu(atom_ppm_table->ulDGpuUlvPower);
238 = le32_to_cpu(atom_ppm_table->ulTjmax);
363 limits->sclk = le32_to_cpu(limitable->entries[0].ulSCLKLimit);
364 limits->mclk = le32_to_cpu(limitable->entries[0].ulMCLKLimit)
    [all...]
amdgpu_processpptables.c 698 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
703 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
708 ps->pcie.lanes = ((le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
716 rrr_index = (le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
733 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
738 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
743 ps->memory.m3arb = (le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
752 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
757 tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &
765 ps->uvd_clocks.VCLK = le32_to_cpu(pnon_clock_info->ulVCLK)
    [all...]
  /src/sys/external/bsd/common/include/asm/
byteorder.h 53 #define le32_to_cpu le32toh macro
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/
amdgpu_bios_parser.c 363 info->acpi_device = le32_to_cpu(device_tag->ulACPIDeviceEnum);
449 le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;
451 le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;
500 le32_to_cpu(firmwareInfo->ulMinPixelClockPLL_Output) * 10;
502 le32_to_cpu(firmwareInfo->ulMaxPixelClockPLL_Output) * 10;
504 le32_to_cpu(firmwareInfo->ulDefaultDispEngineClkFreq) * 10;
586 le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;
588 le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;
590 le32_to_cpu(firmware_info->ulDefaultDispEngineClkFreq) * 10;
647 (uint32_t) (le32_to_cpu(firmware_info->ulGPUPLL_OutputFreq) * 10)
    [all...]

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