| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_si_dma.c | 84 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY,
86 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
87 ib->ptr[ib->length_dw++] = lower_32_bits(src);
88 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
89 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff;
125 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw);
126 ib->ptr[ib->length_dw++] = pe;
127 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
138 ib->ptr[ib->length_dw++] = value;
139 ib->ptr[ib->length_dw++] = upper_32_bits(value)
[all...] |
| radeon_ni_dma.c | 151 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));
332 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY,
334 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
335 ib->ptr[ib->length_dw++] = lower_32_bits(src);
336 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
337 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff;
373 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE,
375 ib->ptr[ib->length_dw++] = pe;
376 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
387 ib->ptr[ib->length_dw++] = value
[all...] |
| radeon_vce.c | 420 ib.length_dw = 0;
421 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
422 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
423 ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
425 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */
426 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */
427 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
428 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042);
429 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a);
430 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001)
[all...] |
| radeon_cs.c | 100 p->nrelocs = chunk->length_dw / 4;
332 p->chunks[i].length_dw = user_chunk.length_dw;
339 if (p->chunks[i].length_dw == 0)
345 if (p->chunks[i].length_dw == 0)
351 if (p->chunks[i].length_dw == 0)
355 size = p->chunks[i].length_dw;
376 if (p->chunks[i].length_dw > 1)
378 if (p->chunks[i].length_dw > 2)
569 if (parser->const_ib.length_dw) {
[all...] |
| radeon_cik_sdma.c | 162 radeon_ring_write(ring, ib->length_dw);
737 ib.length_dw = 5;
818 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY,
820 ib->ptr[ib->length_dw++] = bytes;
821 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
822 ib->ptr[ib->length_dw++] = lower_32_bits(src);
823 ib->ptr[ib->length_dw++] = upper_32_bits(src);
824 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
825 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
861 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE
[all...] |
| radeon_vm.c | 418 ib.length_dw = 0;
422 WARN_ON(ib.length_dw > 64);
672 ib.length_dw = 0;
709 if (ib.length_dw != 0) {
713 WARN_ON(ib.length_dw > ndw);
1010 ib.length_dw = 0;
1028 WARN_ON(ib.length_dw > ndw);
|
| radeon_evergreen_dma.c | 95 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));
|
| radeon_uvd.c | 592 if (idx >= relocs_chunk->length_dw) {
594 idx, relocs_chunk->length_dw);
707 if (p->chunk_ib->length_dw % 16) {
709 p->chunk_ib->length_dw);
737 } while (p->idx < p->chunk_ib->length_dw);
768 ib.length_dw = 16;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_vce.c | 465 ib->length_dw = 0;
466 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */
467 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */
468 ib->ptr[ib->length_dw++] = handle;
471 ib->ptr[ib->length_dw++] = 0x00000040; /* len */
473 ib->ptr[ib->length_dw++] = 0x00000030; /* len */
474 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */
475 ib->ptr[ib->length_dw++] = 0x00000000;
476 ib->ptr[ib->length_dw++] = 0x00000042;
477 ib->ptr[ib->length_dw++] = 0x0000000a
[all...] |
| amdgpu_sdma_v2_4.c | 271 amdgpu_ring_write(ring, ib->length_dw);
636 ib.length_dw = 8;
679 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |
681 ib->ptr[ib->length_dw++] = bytes;
682 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
683 ib->ptr[ib->length_dw++] = lower_32_bits(src);
684 ib->ptr[ib->length_dw++] = upper_32_bits(src);
685 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
686 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
706 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE)
[all...] |
| amdgpu_si_dma.c | 81 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));
283 ib.length_dw = 4;
325 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY,
327 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
328 ib->ptr[ib->length_dw++] = lower_32_bits(src);
329 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
330 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff;
350 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw);
351 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
352 ib->ptr[ib->length_dw++] = upper_32_bits(pe)
[all...] |
| amdgpu_vcn.c | 414 ib->length_dw = 16;
574 ib->length_dw = 0;
575 ib->ptr[ib->length_dw++] = 0x00000018;
576 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
577 ib->ptr[ib->length_dw++] = handle;
578 ib->ptr[ib->length_dw++] = upper_32_bits(addr);
579 ib->ptr[ib->length_dw++] = addr;
580 ib->ptr[ib->length_dw++] = 0x0000000b;
582 ib->ptr[ib->length_dw++] = 0x00000014;
583 ib->ptr[ib->length_dw++] = 0x00000002; /* task info *
[all...] |
| amdgpu_cik_sdma.c | 241 amdgpu_ring_write(ring, ib->length_dw);
697 ib.length_dw = 5;
739 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY,
741 ib->ptr[ib->length_dw++] = bytes;
742 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
743 ib->ptr[ib->length_dw++] = lower_32_bits(src);
744 ib->ptr[ib->length_dw++] = upper_32_bits(src);
745 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
746 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
766 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE
[all...] |
| amdgpu_uvd_v6_0.c | 231 ib->length_dw = 0;
232 ib->ptr[ib->length_dw++] = 0x00000018;
233 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
234 ib->ptr[ib->length_dw++] = handle;
235 ib->ptr[ib->length_dw++] = 0x00010000;
236 ib->ptr[ib->length_dw++] = upper_32_bits(addr);
237 ib->ptr[ib->length_dw++] = addr;
239 ib->ptr[ib->length_dw++] = 0x00000014;
240 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
241 ib->ptr[ib->length_dw++] = 0x0000001c
[all...] |
| amdgpu_sdma_v3_0.c | 445 amdgpu_ring_write(ring, ib->length_dw);
908 ib.length_dw = 8;
950 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |
952 ib->ptr[ib->length_dw++] = bytes;
953 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
954 ib->ptr[ib->length_dw++] = lower_32_bits(src);
955 ib->ptr[ib->length_dw++] = upper_32_bits(src);
956 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
957 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
977 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE)
[all...] |
| amdgpu_sdma_v5_0.c | 407 amdgpu_ring_write(ring, ib->length_dw);
975 ib.length_dw = 8;
1021 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |
1023 ib->ptr[ib->length_dw++] = bytes - 1;
1024 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
1025 ib->ptr[ib->length_dw++] = lower_32_bits(src);
1026 ib->ptr[ib->length_dw++] = upper_32_bits(src);
1027 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
1028 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
1050 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE)
[all...] |
| amdgpu_uvd_v7_0.c | 241 ib->length_dw = 0;
242 ib->ptr[ib->length_dw++] = 0x00000018;
243 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
244 ib->ptr[ib->length_dw++] = handle;
245 ib->ptr[ib->length_dw++] = 0x00000000;
246 ib->ptr[ib->length_dw++] = upper_32_bits(addr);
247 ib->ptr[ib->length_dw++] = addr;
249 ib->ptr[ib->length_dw++] = 0x00000014;
250 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
251 ib->ptr[ib->length_dw++] = 0x0000001c
[all...] |
| amdgpu_sdma_v4_0.c | 815 amdgpu_ring_write(ring, ib->length_dw);
1562 ib.length_dw = 8;
1606 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |
1608 ib->ptr[ib->length_dw++] = bytes - 1;
1609 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
1610 ib->ptr[ib->length_dw++] = lower_32_bits(src);
1611 ib->ptr[ib->length_dw++] = upper_32_bits(src);
1612 ib->ptr[ib->length_dw++] = lower_32_bits(pe);
1613 ib->ptr[ib->length_dw++] = upper_32_bits(pe);
1635 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE)
[all...] |
| amdgpu_vm_sdma.c | 112 WARN_ON(ib->length_dw == 0);
114 WARN_ON(ib->length_dw > p->num_dw_left);
218 ndw -= p->job->ibs->length_dw;
|
| amdgpu_gfx_v8_0.c | 908 ib.length_dw = 5;
1571 ib.length_dw = 0;
1576 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
1577 ib.ptr[ib.length_dw++] = vgpr_init_regs[i] - PACKET3_SET_SH_REG_START;
1578 ib.ptr[ib.length_dw++] = vgpr_init_regs[i + 1];
1582 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
1583 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START;
1584 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr);
1585 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr);
1588 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3)
[all...] |
| amdgpu_gfx_v9_0.c | 1043 ib.length_dw = 5;
4251 ib.length_dw = 0;
4256 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1);
4257 ib.ptr[ib.length_dw++] = SOC15_REG_ENTRY_OFFSET(vgpr_init_regs[i])
4259 ib.ptr[ib.length_dw++] = vgpr_init_regs[i].reg_value;
4263 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2);
4264 ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO)
4266 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr);
4267 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr);
4270 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3)
[all...] |
| amdgpu_jpeg.c | 164 ib->length_dw = 16;
|
| amdgpu_cs.c | 172 p->chunks[i].length_dw = user_chunk.length_dw;
174 size = p->chunks[i].length_dw;
196 if (p->chunks[i].length_dw * sizeof(uint32_t) < size) {
210 if (p->chunks[i].length_dw * sizeof(uint32_t) < size) {
941 ib->length_dw = chunk_ib->ib_bytes / 4;
964 num_deps = chunk->length_dw * 4 /
1037 num_deps = chunk->length_dw * 4 /
1058 num_deps = chunk->length_dw * 4 /
1080 num_deps = chunk->length_dw * 4
[all...] |
| amdgpu_uvd.c | 919 if (ctx->idx >= ib->length_dw) {
962 for (ctx->idx = 0 ; ctx->idx < ib->length_dw; ) {
1007 if (ib->length_dw % 16) {
1009 ib->length_dw);
1092 ib->length_dw = 16;
|
| /src/sys/external/bsd/drm/dist/shared-core/ |
| radeon_cs.c | 204 parser.chunks[i].length_dw = user_chunk.length_dw;
208 size = parser.chunks[i].length_dw * sizeof(uint32_t);
235 DRM_DEBUG("chunk %d %d %d %p\n", i, parser.chunks[i].chunk_id, parser.chunks[i].length_dw,
239 if (parser.chunks[parser.ib_index].length_dw > (16 * 1024)) {
240 DRM_ERROR("cs->dwords too big: %d\n", parser.chunks[parser.ib_index].length_dw);
270 drm_free(parser.chunks[i].kdata, parser.chunks[i].length_dw * sizeof(uint32_t), DRM_MEM_DRIVER);
288 //DRM_INFO("length: %d\n", reloc_chunk->length_dw);
293 if (offset_dw > reloc_chunk->length_dw) {
294 DRM_ERROR("Offset larger than chunk 0x%x %d\n", offset_dw, reloc_chunk->length_dw);
[all...] |
