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    Searched refs:link_settings (Results 1 - 25 of 30) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_link_encoder.c 177 const struct dc_link_settings *link_settings,
189 switch (link_settings->link_rate) {
204 __func__, link_settings->link_rate);
212 struct dc_link_settings *link_settings)
219 if (!value && link_settings->lane_count > LANE_COUNT_TWO)
220 link_settings->lane_count = LANE_COUNT_TWO;
284 const struct dc_link_settings *link_settings,
295 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);
299 if (!update_cfg_data(enc10, link_settings, cfg))
302 enc1_configure_encoder(enc10, link_settings);
    [all...]
dcn21_link_encoder.h 89 const struct dc_link_settings *link_settings,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/virtual/
amdgpu_virtual_link_encoder.c 57 const struct dc_link_settings *link_settings,
62 const struct dc_link_settings *link_settings,
71 const struct link_training_settings *link_settings) {}
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
link_encoder.h 144 const struct dc_link_settings *link_settings,
147 const struct dc_link_settings *link_settings,
155 const struct link_training_settings *link_settings);
184 struct dc_link_settings *link_settings);
stream_encoder.h 91 struct dc_link_settings link_settings; member in struct:encoder_unblank_param
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
link_hwss.h 53 const struct dc_link_settings *link_settings);
70 const struct link_training_settings *link_settings,
hw_sequencer.h 114 struct dc_link_settings *link_settings);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
dce110_hw_sequencer.h 50 struct dc_link_settings *link_settings);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_link_encoder.c 213 const struct dc_link_settings *link_settings,
220 for (i = 0; i < link_settings->lane_count; i++)
223 switch (link_settings->link_rate) {
238 __func__, link_settings->link_rate);
247 const struct dc_link_settings *link_settings,
255 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source);
259 if (!update_cfg_data(enc10, link_settings, cfg))
262 enc1_configure_encoder(enc10, link_settings);
dcn20_hwseq.h 53 struct dc_link_settings *link_settings);
amdgpu_dcn20_stream_encoder.c 457 if (param->link_settings.link_rate != LINK_RATE_UNKNOWN) {
474 param->link_settings.link_rate
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_link_encoder.c 486 const struct dc_link_settings *link_settings)
491 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);
992 const struct dc_link_settings *link_settings,
1005 configure_encoder(enc110, link_settings);
1012 cntl.lanes_number = link_settings->lane_count;
1014 cntl.pixel_clock = link_settings->link_rate
1031 const struct dc_link_settings *link_settings,
1044 configure_encoder(enc110, link_settings);
1051 cntl.lanes_number = link_settings->lane_count;
1053 cntl.pixel_clock = link_settings->link_rat
    [all...]
dce_link_encoder.h 221 const struct dc_link_settings *link_settings,
227 const struct dc_link_settings *link_settings,
244 const struct link_training_settings *link_settings);
dce_clk_mgr.c 532 cfg->link_settings.lane_count =
534 cfg->link_settings.link_rate =
536 cfg->link_settings.link_spread =
amdgpu_dce_stream_encoder.c 980 if (param->link_settings.link_rate != LINK_RATE_UNKNOWN) {
992 param->link_settings.link_rate
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_link_encoder.c 497 const struct dc_link_settings *link_settings)
501 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE);
954 const struct dc_link_settings *link_settings,
967 enc1_configure_encoder(enc10, link_settings);
974 cntl.lanes_number = link_settings->lane_count;
976 cntl.pixel_clock = link_settings->link_rate
993 const struct dc_link_settings *link_settings,
1006 enc1_configure_encoder(enc10, link_settings);
1013 cntl.lanes_number = link_settings->lane_count;
1015 cntl.pixel_clock = link_settings->link_rat
    [all...]
dcn10_link_encoder.h 511 const struct dc_link_settings *link_settings);
525 const struct dc_link_settings *link_settings,
531 const struct dc_link_settings *link_settings,
542 const struct link_training_settings *link_settings);
dcn10_hw_sequencer.h 59 struct dc_link_settings *link_settings);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_link_dp.c 142 (lt_settings->link_settings.link_spread);
145 lt_settings->link_settings.lane_count;
164 lt_settings->link_settings.use_link_rate_set == true) {
168 &lt_settings->link_settings.link_rate_set, 1);
170 rate = (uint8_t) (lt_settings->link_settings.link_rate);
178 lt_settings->link_settings.link_rate,
180 lt_settings->link_settings.lane_count,
183 lt_settings->link_settings.link_spread);
188 lt_settings->link_settings.link_rate_set,
190 lt_settings->link_settings.lane_count
2027 struct dc_link_settings link_settings = {0}; local in function:get_common_supported_link_settings
2472 struct dc_link_settings link_settings = {0}; local in function:dp_test_send_link_training
2505 struct dc_link_training_settings link_settings; local in function:dp_test_send_phy_test_pattern
    [all...]
amdgpu_dc_link_hwss.c 100 const struct dc_link_settings *link_settings)
137 link_settings,
142 link_settings,
149 link->cur_link_settings = *link_settings;
282 const struct link_training_settings *link_settings,
291 encoder->funcs->dp_set_lane_settings(encoder, link_settings);
amdgpu_dc_link.c 1496 struct dc_link_settings link_settings = {0}; local in function:enable_link_dp
1510 decide_link_settings(stream, &link_settings);
1519 link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;
1525 if (link_settings.link_rate == LINK_RATE_LOW)
1529 &link_settings,
1534 link->cur_link_settings = link_settings;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/include/
link_service_types.h 74 struct dc_link_settings link_settings; member in struct:link_training_settings
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/
amdgpu_dce110_clk_mgr.c 160 cfg->link_settings.lane_count =
162 cfg->link_settings.link_rate =
164 cfg->link_settings.link_spread =
  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm_debugfs.c 52 * debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
56 * cat link_settings
66 * echo <lane_count> <link_rate> > link_settings
69 * echo 4 0xa > link_settings
77 * cat link_settings
262 * There should be debugfs file, like link_settings, phy_settings.
263 * cat link_settings
395 link_lane_settings.link_settings.lane_count =
397 link_lane_settings.link_settings.link_rate =
399 link_lane_settings.link_settings.link_spread
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dm_services_types.h 133 struct dc_link_settings link_settings; /* DP only */ member in struct:dm_pp_single_disp_config

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