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    Searched refs:max_handles (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_uvd_v4_2.c 67 (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3;
80 WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles);
radeon_uvd.c 145 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES;
173 rdev->uvd.max_handles = RADEON_MAX_UVD_HANDLES;
193 RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles;
226 for (i = 0; i < rdev->uvd.max_handles; ++i) {
263 for (i = 0; i < rdev->uvd.max_handles; ++i) {
338 for (i = 0; i < rdev->uvd.max_handles; ++i) {
523 for (i = 0; i < p->rdev->uvd.max_handles; ++i) {
549 for (i = 0; i < p->rdev->uvd.max_handles; ++i) {
564 for (i = 0; i < p->rdev->uvd.max_handles; ++i)
866 for (i = 0; i < rdev->uvd.max_handles; ++i)
    [all...]
radeon_uvd_v2_2.c 130 (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3;
radeon_uvd_v1_0.c 138 (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3;
radeon.h 1720 unsigned max_handles; member in struct:radeon_uvd
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd.h 59 unsigned max_handles; member in struct:amdgpu_uvd
amdgpu_uvd.c 213 adev->uvd.max_handles = AMDGPU_DEFAULT_UVD_HANDLES;
234 adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
253 adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
259 + AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles;
275 for (i = 0; i < adev->uvd.max_handles; ++i) {
365 for (i = 0; i < adev->uvd.max_handles; ++i)
369 if (i == adev->uvd.max_handles)
443 for (i = 0; i < adev->uvd.max_handles; ++i) {
765 for (i = 0; i < adev->uvd.max_handles; ++i) {
789 for (i = 0; i < adev->uvd.max_handles; ++i)
    [all...]
amdgpu_uvd_v4_2.c 564 (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles)) >> 3;
amdgpu_uvd_v5_0.c 281 (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles);
amdgpu_uvd_v6_0.c 607 (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles);
615 WREG32(mmUVD_GP_SCRATCH4, adev->uvd.max_handles);
amdgpu_uvd_v7_0.c 711 WREG32_SOC15(UVD, i, mmUVD_GP_SCRATCH4, adev->uvd.max_handles);
847 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_GP_SCRATCH4), adev->uvd.max_handles);
amdgpu_kms.c 826 handle.uvd_max_handles = adev->uvd.max_handles;

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