| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v6_0.c | 1341 adev->gfx.config.max_sh_per_se);
1382 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1);
1475 adev->gfx.config.max_sh_per_se;
1480 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1484 ((i * adev->gfx.config.max_sh_per_se + j) *
1508 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1556 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1594 adev->gfx.config.max_sh_per_se = 2;
1611 adev->gfx.config.max_sh_per_se = 2;
1628 adev->gfx.config.max_sh_per_se = 2
[all...] |
| amdgpu_atomfirmware.c | 449 adev->gfx.config.max_sh_per_se = gfx_info->v24.max_sh_per_se;
|
| amdgpu_gfx.h | 137 unsigned max_sh_per_se; member in struct:amdgpu_gfx_config
|
| amdgpu_gfx_v7_0.c | 1640 adev->gfx.config.max_sh_per_se);
1682 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1);
1802 adev->gfx.config.max_sh_per_se;
1807 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1810 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *
1836 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
3379 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
4278 adev->gfx.config.max_sh_per_se = 1;
4295 adev->gfx.config.max_sh_per_se = 1;
4313 adev->gfx.config.max_sh_per_se = 1
[all...] |
| amdgpu_discovery.c | 395 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->gc_num_sa_per_se);
|
| amdgpu_debugfs.c | 158 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) ||
565 config[no_regs++] = adev->gfx.config.max_sh_per_se;
|
| amdgpu_gfx_v8_0.c | 1698 adev->gfx.config.max_sh_per_se = 1;
1715 adev->gfx.config.max_sh_per_se = 1;
1762 adev->gfx.config.max_sh_per_se = 1;
1778 adev->gfx.config.max_sh_per_se = 1;
1795 adev->gfx.config.max_sh_per_se = 1;
1813 adev->gfx.config.max_sh_per_se = 1;
3461 adev->gfx.config.max_sh_per_se);
3512 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1);
3623 adev->gfx.config.max_sh_per_se;
3628 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++)
[all...] |
| amdgpu_amdkfd.c | 459 cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
|
| amdgpu_gfx_v9_0.c | 1686 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
2370 adev->gfx.config.max_sh_per_se);
2381 adev->gfx.config.max_sh_per_se;
2385 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
2388 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *
2529 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
4211 adev->gfx.config.max_sh_per_se;
6710 adev->gfx.config.max_sh_per_se > 16)
6715 adev->gfx.config.max_sh_per_se);
6719 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++)
[all...] |
| amdgpu_gfx_v10_0.c | 1533 adev->gfx.config.max_sh_per_se);
1544 adev->gfx.config.max_sh_per_se;
1548 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
1551 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) *
1572 num_sc = adev->gfx.config.max_shader_engines * adev->gfx.config.max_sh_per_se *
1683 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
5332 adev->gfx.config.max_sh_per_se *
5402 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
|
| amdgpu_atombios.c | 735 adev->gfx.config.max_sh_per_se = gfx_info->info.max_sh_per_se;
|
| amdgpu_kms.c | 706 dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
|
| amdgpu_device.c | 1683 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se);
3242 adev->gfx.config.max_sh_per_se,
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_kms.c | 456 *value = rdev->config.cik.max_sh_per_se;
458 *value = rdev->config.si.max_sh_per_se;
|
| radeon_si.c | 3114 rdev->config.si.max_sh_per_se = 2;
3131 rdev->config.si.max_sh_per_se = 2;
3149 rdev->config.si.max_sh_per_se = 2;
3166 rdev->config.si.max_sh_per_se = 1;
3183 rdev->config.si.max_sh_per_se = 1;
3300 rdev->config.si.max_sh_per_se,
3304 rdev->config.si.max_sh_per_se,
3309 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) {
5336 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) {
|
| radeon_cik.c | 3208 rdev->config.cik.max_sh_per_se = 1;
3225 rdev->config.cik.max_sh_per_se = 1;
3243 rdev->config.cik.max_sh_per_se = 1;
3261 rdev->config.cik.max_sh_per_se = 1;
3363 rdev->config.cik.max_sh_per_se,
3368 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
5815 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
6582 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) {
|
| radeon.h | 2179 unsigned max_sh_per_se; member in struct:si_asic
2210 unsigned max_sh_per_se; member in struct:cik_asic
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| atomfirmware.h | 1229 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_2
1249 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_3
1274 uint8_t max_sh_per_se; member in struct:atom_gfx_info_v2_4
|
| atombios.h | 5655 UCHAR max_sh_per_se; member in struct:_ATOM_GFX_INFO_V2_1
|
