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    Searched refs:mmALPHA_CONTROL (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 2194 tmp = RREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset);
2196 WREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v11_0.c 2227 tmp = RREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset);
2229 WREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v8_0.c 2085 WREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_8_0_d.h 2797 #define mmALPHA_CONTROL 0x1abc
dce_10_0_d.h 3576 #define mmALPHA_CONTROL 0x1abc
dce_11_0_d.h 3337 #define mmALPHA_CONTROL 0x1abc
dce_11_2_d.h 4568 #define mmALPHA_CONTROL 0x1abc

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