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    Searched refs:mmCC_RB_BACKEND_DISABLE (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vi.c 551 {mmCC_RB_BACKEND_DISABLE, true},
568 case mmCC_RB_BACKEND_DISABLE:
amdgpu_cik.c 1045 {mmCC_RB_BACKEND_DISABLE, true},
1063 case mmCC_RB_BACKEND_DISABLE:
amdgpu_gfx_v6_0.c 1335 data = RREG32(mmCC_RB_BACKEND_DISABLE) |
1511 RREG32(mmCC_RB_BACKEND_DISABLE);
amdgpu_si.c 1045 case mmCC_RB_BACKEND_DISABLE:
amdgpu_gfx_v7_0.c 1633 data = RREG32(mmCC_RB_BACKEND_DISABLE);
1839 RREG32(mmCC_RB_BACKEND_DISABLE);
amdgpu_gfx_v8_0.c 3455 data = RREG32(mmCC_RB_BACKEND_DISABLE) |
3660 RREG32(mmCC_RB_BACKEND_DISABLE);
amdgpu_gfx_v10_0.c 1526 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);
amdgpu_gfx_v9_0.c 2363 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 294 #define mmCC_RB_BACKEND_DISABLE 0x263D
gfx_7_0_d.h 687 #define mmCC_RB_BACKEND_DISABLE 0x263d
gfx_7_2_d.h 700 #define mmCC_RB_BACKEND_DISABLE 0x263d
gfx_8_0_d.h 772 #define mmCC_RB_BACKEND_DISABLE 0x263d
gfx_8_1_d.h 772 #define mmCC_RB_BACKEND_DISABLE 0x263d
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 932 #define mmCC_RB_BACKEND_DISABLE 0x063d
gc_9_1_offset.h 902 #define mmCC_RB_BACKEND_DISABLE 0x063d
gc_9_2_1_offset.h 868 #define mmCC_RB_BACKEND_DISABLE 0x063d
gc_10_1_0_offset.h 2846 #define mmCC_RB_BACKEND_DISABLE 0x13dd
    [all...]

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