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Searched refs:mmCP_INT_CNTL_RING1 (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`3269 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING1); 3271 WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl); 3282 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING1); 3284 WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl);`
amdgpu_gfx_v10_0.c	`4823 cp_int_cntl_reg = SOC15_REG_OFFSET(GC, 0, mmCP_INT_CNTL_RING1);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`441 #define mmCP_INT_CNTL_RING1 0x306B`
gfx_7_0_d.h	`225 #define mmCP_INT_CNTL_RING1 0x306b`
gfx_7_2_d.h	`225 #define mmCP_INT_CNTL_RING1 0x306b`
gfx_8_0_d.h	`249 #define mmCP_INT_CNTL_RING1 0x306b`
gfx_8_1_d.h	`250 #define mmCP_INT_CNTL_RING1 0x306b`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2467 #define mmCP_INT_CNTL_RING1 0x106b`
gc_9_1_offset.h	`2744 #define mmCP_INT_CNTL_RING1 0x106b`
gc_9_2_1_offset.h	`2682 #define mmCP_INT_CNTL_RING1 0x106b`
gc_10_1_0_offset.h	`4808 #define mmCP_INT_CNTL_RING1 0x1e0b [all...]`

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