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Searched refs:mmCP_QUEUE_THRESHOLDS (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`495 #define mmCP_QUEUE_THRESHOLDS 0x21D8`
gfx_7_0_d.h	`539 #define mmCP_QUEUE_THRESHOLDS 0x21d8`
gfx_7_2_d.h	`552 #define mmCP_QUEUE_THRESHOLDS 0x21d8`
gfx_8_0_d.h	`605 #define mmCP_QUEUE_THRESHOLDS 0x21d8`
gfx_8_1_d.h	`605 #define mmCP_QUEUE_THRESHOLDS 0x21d8`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`1740 WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 << CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`222 #define mmCP_QUEUE_THRESHOLDS 0x01d8`
gc_9_1_offset.h	`222 #define mmCP_QUEUE_THRESHOLDS 0x01d8`
gc_9_2_1_offset.h	`216 #define mmCP_QUEUE_THRESHOLDS 0x01d8`
gc_10_1_0_offset.h	`2226 #define mmCP_QUEUE_THRESHOLDS 0x0f78 [all...]`

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