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Searched refs:mmCP_RB0_BASE (Results 1 - 14 of 14) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`496 #define mmCP_RB0_BASE 0x3040`
gfx_7_0_d.h	`197 #define mmCP_RB0_BASE 0x3040`
gfx_7_2_d.h	`197 #define mmCP_RB0_BASE 0x3040`
gfx_8_0_d.h	`221 #define mmCP_RB0_BASE 0x3040`
gfx_8_1_d.h	`222 #define mmCP_RB0_BASE 0x3040`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`2137 WREG32(mmCP_RB0_BASE, ring->gpu_addr >> 8);`
amdgpu_gfx_v10_0.c	`2819 WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);`
amdgpu_gfx_v7_0.c	`2654 WREG32(mmCP_RB0_BASE, rb_addr);`
amdgpu_gfx_v8_0.c	`4308 WREG32(mmCP_RB0_BASE, rb_addr);`
amdgpu_gfx_v9_0.c	`3217 WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2359 #define mmCP_RB0_BASE 0x1040`
gc_9_1_offset.h	`2636 #define mmCP_RB0_BASE 0x1040`
gc_9_2_1_offset.h	`2574 #define mmCP_RB0_BASE 0x1040`
gc_10_1_0_offset.h	`4706 #define mmCP_RB0_BASE 0x1de0 [all...]`

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