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    Searched refs:mmCP_RB0_RPTR_ADDR_HI (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 500 #define mmCP_RB0_RPTR_ADDR_HI 0x3044
gfx_7_0_d.h 212 #define mmCP_RB0_RPTR_ADDR_HI 0x3044
gfx_7_2_d.h 212 #define mmCP_RB0_RPTR_ADDR_HI 0x3044
gfx_8_0_d.h 236 #define mmCP_RB0_RPTR_ADDR_HI 0x3044
gfx_8_1_d.h 237 #define mmCP_RB0_RPTR_ADDR_HI 0x3044
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c 2130 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);
amdgpu_gfx_v10_0.c 2806 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &
amdgpu_gfx_v7_0.c 2645 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);
amdgpu_gfx_v8_0.c 4299 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);
amdgpu_gfx_v9_0.c 3207 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2373 #define mmCP_RB0_RPTR_ADDR_HI 0x1044
gc_9_1_offset.h 2650 #define mmCP_RB0_RPTR_ADDR_HI 0x1044
gc_9_2_1_offset.h 2588 #define mmCP_RB0_RPTR_ADDR_HI 0x1044
gc_10_1_0_offset.h 4720 #define mmCP_RB0_RPTR_ADDR_HI 0x1de4
    [all...]

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