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Searched refs:mmCP_RB1_RPTR_ADDR_HI (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`506 #define mmCP_RB1_RPTR_ADDR_HI 0x3063`
gfx_7_0_d.h	`214 #define mmCP_RB1_RPTR_ADDR_HI 0x3063`
gfx_7_2_d.h	`214 #define mmCP_RB1_RPTR_ADDR_HI 0x3063`
gfx_8_0_d.h	`238 #define mmCP_RB1_RPTR_ADDR_HI 0x3063`
gfx_8_1_d.h	`239 #define mmCP_RB1_RPTR_ADDR_HI 0x3063`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`2216 WREG32(mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);`
amdgpu_gfx_v10_0.c	`2842 WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2451 #define mmCP_RB1_RPTR_ADDR_HI 0x1063`
gc_9_1_offset.h	`2728 #define mmCP_RB1_RPTR_ADDR_HI 0x1063`
gc_9_2_1_offset.h	`2666 #define mmCP_RB1_RPTR_ADDR_HI 0x1063`
gc_10_1_0_offset.h	`4794 #define mmCP_RB1_RPTR_ADDR_HI 0x1e03 [all...]`

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