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Searched refs:mmCP_RB2_CNTL (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`2228 WREG32(mmCP_RB2_CNTL, tmp); 2230 WREG32(mmCP_RB2_CNTL, tmp \| CP_RB2_CNTL__RB_RPTR_WR_ENA_MASK); 2238 WREG32(mmCP_RB2_CNTL, tmp);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`509 #define mmCP_RB2_CNTL 0x3066`
gfx_7_0_d.h	`206 #define mmCP_RB2_CNTL 0x3066`
gfx_7_2_d.h	`206 #define mmCP_RB2_CNTL 0x3066`
gfx_8_0_d.h	`230 #define mmCP_RB2_CNTL 0x3066`
gfx_8_1_d.h	`231 #define mmCP_RB2_CNTL 0x3066`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2455 #define mmCP_RB2_CNTL 0x1066`
gc_9_1_offset.h	`2732 #define mmCP_RB2_CNTL 0x1066`
gc_9_2_1_offset.h	`2670 #define mmCP_RB2_CNTL 0x1066`
gc_10_1_0_offset.h	`4800 #define mmCP_RB2_CNTL 0x1e06 [all...]`

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