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    Searched refs:mmCP_SEM_INCOMPLETE_TIMER_CNTL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 545 #define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0x2172
gfx_7_0_d.h 448 #define mmCP_SEM_INCOMPLETE_TIMER_CNTL 0xc072
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c 2103 WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);
amdgpu_gfx_v7_0.c 2617 WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

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