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Searched refs:mmCRTC_UPDATE_LOCK (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c	`499 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); 503 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);`
amdgpu_dce_v11_0.c	`525 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); 529 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);`
amdgpu_dce_v6_0.c	`395 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); 399 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);`
amdgpu_dce_v8_0.c	`439 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); 443 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`1017 #define mmCRTC_UPDATE_LOCK 0x1BB5`
dce_8_0_d.h	`510 #define mmCRTC_UPDATE_LOCK 0x1bb5`
dce_10_0_d.h	`590 #define mmCRTC_UPDATE_LOCK 0x1bb5`
dce_11_0_d.h	`492 #define mmCRTC_UPDATE_LOCK 0x1bb5`
dce_11_2_d.h	`499 #define mmCRTC_UPDATE_LOCK 0x1bb5`

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