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    Searched refs:mmDEGAMMA_CONTROL (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 2168 tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
2172 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v11_0.c 2204 tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
2208 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v6_0.c 2097 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
amdgpu_dce_v8_0.c 2067 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 2477 #define mmDEGAMMA_CONTROL 0x1A58
dce_8_0_d.h 2153 #define mmDEGAMMA_CONTROL 0x1a58
dce_10_0_d.h 3002 #define mmDEGAMMA_CONTROL 0x1a58
dce_11_0_d.h 2756 #define mmDEGAMMA_CONTROL 0x1a58
dce_11_2_d.h 3987 #define mmDEGAMMA_CONTROL 0x1a58

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