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Searched refs:mmDPG_PIPE_URGENCY_CONTROL (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c	`1133 tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); 1136 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp); 1140 tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); 1143 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp);`
amdgpu_dce_v11_0.c	`1159 tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); 1162 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp); 1166 tmp = RREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset); 1169 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp);`
amdgpu_dce_v6_0.c	`967 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, 975 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,`
amdgpu_dce_v8_0.c	`1070 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, 1078 WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`3558 #define mmDPG_PIPE_URGENCY_CONTROL 0x1B33`
dce_8_0_d.h	`5189 #define mmDPG_PIPE_URGENCY_CONTROL 0x1b33`
dce_10_0_d.h	`6403 #define mmDPG_PIPE_URGENCY_CONTROL 0x1b33`
dce_11_0_d.h	`6525 #define mmDPG_PIPE_URGENCY_CONTROL 0x1b33`
dce_11_2_d.h	`7823 #define mmDPG_PIPE_URGENCY_CONTROL 0x1b33`

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