HomeSort by: relevance | last modified time | path
    Searched refs:mmGC_USER_RB_BACKEND_DISABLE (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vi.c 552 {mmGC_USER_RB_BACKEND_DISABLE, true},
570 case mmGC_USER_RB_BACKEND_DISABLE:
amdgpu_cik.c 1046 {mmGC_USER_RB_BACKEND_DISABLE, true},
1065 case mmGC_USER_RB_BACKEND_DISABLE:
amdgpu_gfx_v6_0.c 1336 RREG32(mmGC_USER_RB_BACKEND_DISABLE);
1513 RREG32(mmGC_USER_RB_BACKEND_DISABLE);
amdgpu_si.c 1047 case mmGC_USER_RB_BACKEND_DISABLE:
amdgpu_gfx_v7_0.c 1634 data |= RREG32(mmGC_USER_RB_BACKEND_DISABLE);
1841 RREG32(mmGC_USER_RB_BACKEND_DISABLE);
amdgpu_gfx_v8_0.c 3456 RREG32(mmGC_USER_RB_BACKEND_DISABLE);
3662 RREG32(mmGC_USER_RB_BACKEND_DISABLE);
amdgpu_gfx_v10_0.c 1527 data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);
amdgpu_gfx_v9_0.c 2364 data |= RREG32_SOC15(GC, 0, mmGC_USER_RB_BACKEND_DISABLE);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 693 #define mmGC_USER_RB_BACKEND_DISABLE 0x26DF
gfx_7_0_d.h 689 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df
gfx_7_2_d.h 702 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df
gfx_8_0_d.h 774 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df
gfx_8_1_d.h 774 #define mmGC_USER_RB_BACKEND_DISABLE 0x26df
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 1056 #define mmGC_USER_RB_BACKEND_DISABLE 0x06df
gc_9_1_offset.h 1026 #define mmGC_USER_RB_BACKEND_DISABLE 0x06df
gc_9_2_1_offset.h 992 #define mmGC_USER_RB_BACKEND_DISABLE 0x06df
gc_10_1_0_offset.h 2982 #define mmGC_USER_RB_BACKEND_DISABLE 0x147f
    [all...]

Completed in 161 milliseconds