| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_vce_v3_0.c | 90 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));
92 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));
101 WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);
122 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));
124 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));
133 WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);
153 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));
155 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));
164 WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);
280 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(idx))
[all...] |
| amdgpu_mxgpu_vi.c | 53 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
83 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
130 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
138 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
144 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
174 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
273 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
|
| soc15_common.h | 107 uint32_t grbm_idx = adev->reg_offset[GC_HWIP][0][mmGRBM_GFX_INDEX_BASE_IDX] + mmGRBM_GFX_INDEX; \
|
| amdgpu_si.c | 430 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
455 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
559 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
584 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
657 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
682 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
757 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
782 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
837 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
862 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000
[all...] |
| amdgpu_amdkfd_gfx_v10.c | 756 WREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_INDEX), gfx_index_val);
766 WREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_GFX_INDEX), data);
|
| amdgpu_amdkfd_gfx_v7.c | 646 WREG32(mmGRBM_GFX_INDEX, gfx_index_val);
655 WREG32(mmGRBM_GFX_INDEX, data);
|
| amdgpu_amdkfd_gfx_v8.c | 619 WREG32(mmGRBM_GFX_INDEX, gfx_index_val);
629 WREG32(mmGRBM_GFX_INDEX, data);
|
| amdgpu_amdkfd_gfx_v9.c | 686 WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, gfx_index_val);
696 WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, data);
|
| amdgpu_gfx_v8_0.c | 226 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
239 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
268 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
338 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
369 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
400 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
412 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
420 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
442 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
471 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000
[all...] |
| amdgpu_gfx_v9_4.c | 122 WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, data);
916 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);
|
| amdgpu_gfx_v9_0.c | 2356 WREG32_SOC15_RLC_SHADOW(GC, 0, mmGRBM_GFX_INDEX, data);
6345 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000);
|
| amdgpu_gfx_v6_0.c | 1328 WREG32(mmGRBM_GFX_INDEX, data);
|
| amdgpu_gfx_v10_0.c | 1519 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);
|
| amdgpu_gfx_v7_0.c | 1618 WREG32(mmGRBM_GFX_INDEX, data);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| gc_9_4_1_offset.h | 229 #define mmGRBM_GFX_INDEX 0x2200
|
| gc_9_0_offset.h | 4910 #define mmGRBM_GFX_INDEX 0x2200
|
| gc_9_1_offset.h | 5140 #define mmGRBM_GFX_INDEX 0x2200
|
| gc_9_2_1_offset.h | 5096 #define mmGRBM_GFX_INDEX 0x2200
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_vega10_powertune.c | 950 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);
965 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
1001 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);
1010 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
1062 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);
1073 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
1112 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data);
1121 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
1171 WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000);
|
| amdgpu_smu7_powertune.c | 978 value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX);
983 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value);
1010 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| gfx_6_0_d.h | 752 #define mmGRBM_GFX_INDEX 0x200B
|
| gfx_7_0_d.h | 785 #define mmGRBM_GFX_INDEX 0xc200
|
| gfx_7_2_d.h | 798 #define mmGRBM_GFX_INDEX 0xc200
|
| gfx_8_0_d.h | 873 #define mmGRBM_GFX_INDEX 0xc200
|
| gfx_8_1_d.h | 873 #define mmGRBM_GFX_INDEX 0xc200
|
