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    Searched refs:mmHDMI_ACR_PACKET_CONTROL (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1676 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset);
1685 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);
amdgpu_dce_v11_0.c 1718 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset);
1727 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);
amdgpu_dce_v6_0.c 1422 tmp = RREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset);
1426 WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);
amdgpu_dce_v8_0.c 1616 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,
1619 WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 3858 #define mmHDMI_ACR_PACKET_CONTROL 0x1C0F
dce_8_0_d.h 2921 #define mmHDMI_ACR_PACKET_CONTROL 0x1c0f
dce_10_0_d.h 3700 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c
dce_11_0_d.h 3499 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c
dce_11_2_d.h 4730 #define mmHDMI_ACR_PACKET_CONTROL 0x4a0c

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