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Searched refs:mmHDMI_VBI_PACKET_CONTROL (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c	`1606 tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset); 1608 WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp); /* send null packets when required */ 1639 tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset); 1643 WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);`
amdgpu_dce_v11_0.c	`1648 tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset); 1650 WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp); /* send null packets when required */ 1681 tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset); 1685 WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);`
amdgpu_dce_v6_0.c	`1405 tmp = RREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset); 1409 WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);`
amdgpu_dce_v8_0.c	`1555 WREG32(mmHDMI_VBI_PACKET_CONTROL + offset, 1589 WREG32(mmHDMI_VBI_PACKET_CONTROL + offset,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`3869 #define mmHDMI_VBI_PACKET_CONTROL 0x1C10`
dce_8_0_d.h	`2929 #define mmHDMI_VBI_PACKET_CONTROL 0x1c10`
dce_10_0_d.h	`3708 #define mmHDMI_VBI_PACKET_CONTROL 0x4a0d`
dce_11_0_d.h	`3509 #define mmHDMI_VBI_PACKET_CONTROL 0x4a0d`
dce_11_2_d.h	`4740 #define mmHDMI_VBI_PACKET_CONTROL 0x4a0d`

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