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Searched refs:mmHDP_REG_COHERENCY_FLUSH_CNTL (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_3_0_d.h	`631 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528`
bif_4_1_d.h	`52 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528`
bif_5_0_d.h	`60 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528`
bif_5_1_d.h	`52 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x1528`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gmc_v6_0.c	`252 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);`
amdgpu_gmc_v7_0.c	`278 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);`
amdgpu_gmc_v8_0.c	`469 WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbif/
nbif_6_1_offset.h	`1125 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x0e16 // duplicate`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_7_0_offset.h	`4476 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x00f6`
nbio_7_4_offset.h	`2904 #define mmHDP_REG_COHERENCY_FLUSH_CNTL 0x00f6`

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