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Searched refs:mmMASTER_UPDATE_MODE (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/
amdgpu_dce100_hw_sequencer.c	`103 HW_REG_CRTC(mmMASTER_UPDATE_MODE, controller_id),`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c	`2082 WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);`
amdgpu_dce_v6_0.c	`2019 WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);`
amdgpu_dce_v8_0.c	`1991 WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`3963 #define mmMASTER_UPDATE_MODE 0x1BBE`
dce_8_0_d.h	`559 #define mmMASTER_UPDATE_MODE 0x1bbe`
dce_10_0_d.h	`646 #define mmMASTER_UPDATE_MODE 0x1bbe`

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