HomeSort by: relevance | last modified time | path
    Searched refs:mmMMEA1_EDC_CNT2 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mmhub_v9_4.c 818 { "MMEA1_GMIRD_CMDMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
822 { "MMEA1_GMIWR_CMDMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
826 { "MMEA1_GMIWR_DATAMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
830 { "MMEA1_GMIRD_PAGEMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
834 { "MMEA1_GMIWR_PAGEMEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
866 { "MMEA1_MAM_D0MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
870 { "MMEA1_MAM_D1MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
874 { "MMEA1_MAM_D2MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
878 { "MMEA1_MAM_D3MEM", SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2),
1525 { SOC15_REG_ENTRY(MMHUB, 0, mmMMEA1_EDC_CNT2), 0, 0, 0 }
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_1_0_offset.h 1104 #define mmMMEA1_EDC_CNT2 0x0342
mmhub_9_1_offset.h 1104 #define mmMMEA1_EDC_CNT2 0x0342
mmhub_9_3_0_offset.h 1108 #define mmMMEA1_EDC_CNT2 0x0347
mmhub_9_4_1_offset.h 2200 #define mmMMEA1_EDC_CNT2 0x04c7

Completed in 49 milliseconds