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    Searched refs:mmREGAMMA_CONTROL (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 2179 tmp = RREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
2182 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v11_0.c 2214 tmp = RREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
2216 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);
amdgpu_dce_v6_0.c 2105 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
amdgpu_dce_v8_0.c 2074 WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h 4108 #define mmREGAMMA_CONTROL 0x1AA0
dce_8_0_d.h 2601 #define mmREGAMMA_CONTROL 0x1aa0
dce_10_0_d.h 3380 #define mmREGAMMA_CONTROL 0x1aa0
dce_11_0_d.h 3141 #define mmREGAMMA_CONTROL 0x1aa0
dce_11_2_d.h 4372 #define mmREGAMMA_CONTROL 0x1aa0

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