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Searched refs:mmRLC_LB_CNTR_INIT (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`1151 #define mmRLC_LB_CNTR_INIT 0x30C6`
gfx_7_0_d.h	`1260 #define mmRLC_LB_CNTR_INIT 0x30db`
gfx_7_2_d.h	`1273 #define mmRLC_LB_CNTR_INIT 0x30db`
gfx_8_0_d.h	`1367 #define mmRLC_LB_CNTR_INIT 0xec1b`
gfx_8_1_d.h	`1370 #define mmRLC_LB_CNTR_INIT 0xec1b`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_0.c	`1723 /* set mmRLC_LB_CNTR_INIT = 0x0000_0000 / 1724 WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000); 1772 / set mmRLC_LB_CNTR_INIT = 0x0000_0000 */ 1773 WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000);`
amdgpu_gfx_v6_0.c	`2546 WREG32(mmRLC_LB_CNTR_INIT, 0);`
amdgpu_gfx_v7_0.c	`3549 WREG32(mmRLC_LB_CNTR_INIT, 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6004 #define mmRLC_LB_CNTR_INIT 0x4c1b`
gc_9_1_offset.h	`6226 #define mmRLC_LB_CNTR_INIT 0x4c1b`
gc_9_2_1_offset.h	`6190 #define mmRLC_LB_CNTR_INIT 0x4c1b`

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