HomeSort by: relevance | last modified time | path
    Searched refs:mmRLC_PG_ALWAYS_ON_CU_MASK (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 1166 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x310B
gfx_7_0_d.h 1293 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x3113
gfx_7_2_d.h 1306 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x3113
gfx_8_0_d.h 1406 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0xec53
gfx_8_1_d.h 1406 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0xec53
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c 2792 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);
amdgpu_gfx_v7_0.c 3849 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);
amdgpu_gfx_v8_0.c 4065 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);
amdgpu_gfx_v9_0.c 1695 WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6062 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x4c53
gc_9_1_offset.h 6284 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x4c53
gc_9_2_1_offset.h 6260 #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x4c53

Completed in 110 milliseconds