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Searched refs:mmRLC_UCODE_CNTL (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`1181 #define mmRLC_UCODE_CNTL 0x30D2`
gfx_7_0_d.h	`1273 #define mmRLC_UCODE_CNTL 0x30e7`
gfx_7_2_d.h	`1286 #define mmRLC_UCODE_CNTL 0x30e7`
gfx_8_0_d.h	`1384 #define mmRLC_UCODE_CNTL 0xec27`
gfx_8_1_d.h	`1386 #define mmRLC_UCODE_CNTL 0xec27`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`2550 WREG32(mmRLC_UCODE_CNTL, 0);`
amdgpu_gfx_v7_0.c	`3560 WREG32(mmRLC_UCODE_CNTL, 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6018 #define mmRLC_UCODE_CNTL 0x4c27`
gc_9_1_offset.h	`6240 #define mmRLC_UCODE_CNTL 0x4c27`
gc_9_2_1_offset.h	`6204 #define mmRLC_UCODE_CNTL 0x4c27`
gc_10_1_0_offset.h	`9326 #define mmRLC_UCODE_CNTL 0x4c27 [all...]`

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