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Searched refs:mmSDMA0_GFX_APE1_CNTL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h	`209 #define mmSDMA0_GFX_APE1_CNTL 0x34a8`
oss_2_0_d.h	`268 #define mmSDMA0_GFX_APE1_CNTL 0x34a8`
oss_3_0_1_d.h	`237 #define mmSDMA0_GFX_APE1_CNTL 0x34a8`
oss_3_0_d.h	`362 #define mmSDMA0_GFX_APE1_CNTL 0x34a8`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v2_4.c	`433 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);`
amdgpu_cik_sdma.c	`454 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);`
amdgpu_sdma_v3_0.c	`671 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);`

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