HomeSort by: relevance | last modified time | path
    Searched refs:mmSDMA0_GFX_RB_RPTR (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_1_offset.h 212 #define mmSDMA0_GFX_RB_RPTR 0x0083
sdma0_4_0_offset.h 216 #define mmSDMA0_GFX_RB_RPTR 0x0083
sdma0_4_2_2_offset.h 216 #define mmSDMA0_GFX_RB_RPTR 0x0083
sdma0_4_2_offset.h 212 #define mmSDMA0_GFX_RB_RPTR 0x0083
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_d.h 192 #define mmSDMA0_GFX_RB_RPTR 0x3483
oss_2_0_d.h 251 #define mmSDMA0_GFX_RB_RPTR 0x3483
oss_3_0_1_d.h 219 #define mmSDMA0_GFX_RB_RPTR 0x3483
oss_3_0_d.h 344 #define mmSDMA0_GFX_RB_RPTR 0x3483
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v2_4.c 455 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
amdgpu_cik_sdma.c 476 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
amdgpu_sdma_v3_0.c 694 WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
amdgpu_sdma_v5_0.c 647 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), 0);
amdgpu_sdma_v4_0.c 1106 WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h 207 #define mmSDMA0_GFX_RB_RPTR 0x0083
    [all...]

Completed in 161 milliseconds