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    Searched refs:mmUVD_GP_SCRATCH8 (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_6_0_d.h 132 #define mmUVD_GP_SCRATCH8 0x3c0a
uvd_7_0_offset.h 84 #define mmUVD_GP_SCRATCH8 0x040a
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 176 #define mmUVD_GP_SCRATCH8 0x040a
vcn_2_0_0_offset.h 874 #define mmUVD_GP_SCRATCH8 0x05ca
vcn_2_5_offset.h 651 #define mmUVD_GP_SCRATCH8 0x00e6
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd_v6_0.c 1056 amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));
1071 amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));
amdgpu_uvd_v7_0.c 1370 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GP_SCRATCH8), 0));
amdgpu_vcn_v1_0.c 1536 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GP_SCRATCH8), 0));

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